A real-time 256 × 256 point two-dimensional FFT single-chip processor

Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing

Volumn 2, Issue , 1991, Pages 1193-1196

  Miyanaga, Hiroshi ^a   Yamauchi, Hironori ^a   Matsuda, Kazuhiro ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; INTEGRATED CIRCUITS, CMOS; INTEGRATED CIRCUITS, VLSI; SPEECH--PROCESSING; VIDEO RECORDING;

2-D FFT; FFT PROCESSORS; SINGLE-CHIP PROCESSORS; VLSI ARCHITECTURE;

MATHEMATICAL TRANSFORMATIONS;

EID: 0026397907     PISSN: 07367791     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icassp.1991.150595     Document Type: Conference Paper

References (7)