Quasi-static modeling of the self-alignment mechanism in flip-chip soldering — part I: Single solder joint

Journal of Electronic Packaging, Transactions of the ASME

Volumn 113, Issue 4, 1991, Pages 337-342

  Patra, S K ^a   Lee, Y C ^a  

^a UNIVERSITY OF COLORADO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

LIQUIDS - SURFACE TENSION; MATHEMATICAL MODELS; STRESSES;

FLIP-CHIP SOLDERING; SOLDER REFLOWS;

ELECTRONICS PACKAGING;

EID: 0026393814     PISSN: 10437398     EISSN: 15289044     Source Type: Journal    
DOI: 10.1115/1.2905417     Document Type: Article

References (9)

1. Bache, R. A. C., Burdett, P. A., Pickering, K. L., Parson, A. D., and Pedder, D. J., 1988, “Bond Design and Alignment in Flip-Chip Solder Bonding,” IEPS, pp. 830-841.
2. Bilson, R. T., Hepher, M. R., and Mcarthy, J. P., 1983, “Control of Solder Fillet Geometry for Leadless Chip Carrier Applications,” 4th European Hybrid Microelectronics Conference.
3. Chu, T. Y., 1975, “A Hydrostatic Model of Solder Fillets,” Western Electric Engineer, Vol. 19, No. 2, Apr., pp. 31-42.
4. Goldmann, L. S., 1972, “Self-Alignment Capability of Controlled Collapse Chip Joining,” Proc. 22nd Electronic Component Conference.
5. Hildebrand, F. B., 1965, Methods of Applied Mathematics, Second Edition, Prentice-Hall, Inc., Englewood Cliff, NJ, pp. 119-143.
6. Katsura, K., Hayashi, T., Ohira, F., Hata, S., and Iwashita, K., 1990, “A Novel Flip-Chip Interconnection Technique Using Solder Bumps for High Speed Photoreceivers,” J. of Lightwave Tech., Vol. 8, No. 9, pp. 1323-1327.
7. Miller, L. F., 1969, “Controlled Collapse of Reflow Chip Joining,” IBM J. Res. Develop., Vol. 13, pp. 239-250.
8. Pfeiffer, L West, K. W., and Wong, Y. H., 1987, “Self-Aligned Controlled Collapse Chip Connect (SAC4),” J. Electrochem. Soc., pp. 2940-2941.
9. Satoh, R., Oshima, M., Komura, H., Ishi, I., and Serizawa, K., 1983, “Development of a New Micro-Solder Bonding Method for VLSIs,” IEPS, pp. 455-461.