The Dilated Slipped Banyan Switching Network Architecture for Use in an All-Optical Local-Area Network

Journal of Lightwave Technology

Volumn 9, Issue 12, 1991, Pages 1780-1787

  Thompson, Richard A ^a  

^a UNIVERSITY OF PITTSBURGH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORKS, SWITCHING; OPTICAL COMMUNICATION; OPTICAL DEVICES; SWITCHING SYSTEMS;

ALL-OPTICAL LAN; BANYAN SWITCHING NETWORKS; DILATED SLIPPED BANYAN; SWITCHING NETWORK ARCHITECTURE;

COMPUTER NETWORKS;

EID: 0026383212     PISSN: 07338724     EISSN: 15582213     Source Type: Journal    
DOI: 10.1109/50.108724     Document Type: Article

References (16)

1. S. K. Korotky et. al., “An experimental synchronized optical network using a high-speed time-multiplexed Ti: LiNbO3 switch,” Conf. Optical Fiber Commun., Feb. 1989.
2. K. E. Batcher, “The Flip network in staran,” 1976 Int’l Conf. Parallel Proc., pp. 65-71.
3. K. E. Batcher, “The multi-dimensional access in staran,” IEEE Trans. Comput. Special Issue on Parallel Processing, pp. 174-177, Feb. 1977.
4. Wen, Ph.D. Dissertation, Univ. of Illinois.
5. R. A. Thompson, R. V. Anderson, J. V. Camlet, and P. P. Giordano, “An experimental modular switching system with a time-multiplexed photonic center-stage,” Conf. Optical Fiber Commun., Feb. 1989.
6. R. A. Thompson, J. J. Horenkamp, and G. D. Bergland, “The photonic switching of universal timeslots,” International Switching Symp., Apr. 1990.
7. K. Padmanabhan and A. N. Netravali, “Dilated networks for photonic switching,” OSA Topical Meet. Photon. Switching, Mar. 1987.
8. K. Padmanabhan and A. N. Netravali, Photonic Switching. New York: Springer-Verlag, 1988.
9. K. Padmanabhan and A. N. Netravali, IEEE Trans, on Commun., Dec. 1987.
10. M. C. Pease, “The indirect binary n-cube microprocessor array,” IEEE Trans, on Comp., May 1977.
11. U. Mukherji and H. V. Jagadish, Periodic Time-Slot Scheduling in Unbuffered Interconnection Network. Globecom, 1988.
12. D. H. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans, on Comp., vol. c-24, no. 12, pp. 1145-1155, Dec. 1975.
13. V. E. Benes, Math. Theory of Connecting Networks and Telephone Traffic. New York: Academic, 1965.
14. C. Clos, “A study of non-blocking switching networks,” BSTJ, vol. 32, pp. 406-424, Mar. 1953.
15. K. E. Batcher, “Sorting networks and their applications,” 1968 Spring Joint Comp. Conf., AFIPS Conf Proc., vol. 32, pp. 159-163.
16. H. S. Stone, “Parallel processing with the perfect shuffle,” IEEE Trans. Comp., Vol. C-20, pp. 153-161, Feb. 1971.