Device-circuit mixed simulation of VDMOS charge transients

Solid State Electronics

Volumn 34, Issue 12, 1991, Pages 1353-1360

  M A Ravanelli, Enrico ^a   Hu, Chenming ^b  

^a STMICROELECTRONICS   (Italy)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION--APPLICATIONS;

ACCUMULATION CHARGE; DEVICE-CIRCUIT MIXED SIMULATION; FOUR-REGION GATE CHARGE CHARACTERISTIC; SWITCHING GATE CHARGE CHARACTERISTICS; TERRACED GATE STRUCTURE; VDMOS CHARGE TRANSIENTS;

SEMICONDUCTOR DEVICES, MOS;

EID: 0026372678     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(91)90029-X     Document Type: Article

References (12)

1. A new vertical double diffused MOSFET—The self-aligned terraced-gate MOSFET
2. A new integrated silicon gate technology combining bipolar linear, CMOS logic, and DMOS power parts
3. Power Conv. Intell. Motion