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Volumn 26, Issue 12, 1991, Pages 1809-1816

A High-Linearity 50-Ω CMOS Differential Driver for ISDN Applications

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL COMMUNICATION SYSTEMS--VOICE/DATA INTEGRATED SERVICES; MATHEMATICAL TECHNIQUES--POLES AND ZEROS; SEMICONDUCTOR DEVICES, MOS--APPLICATIONS;

EID: 0026368696     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.104172     Document Type: Article
Times cited : (19)

References (9)
  • 1
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    • ISDN transceiver analog front end
    • May
    • N. Von Bavel et al., “ISDN transceiver analog front end” in CICC Dig. Tech. Papers, May 1990, pp. 12.1.1-12.1.5.
    • (1990) CICC Dig. Tech. Papers , pp. 12.1.1-12.1.5
    • Von Bavel, N.1
  • 2
    • 0024885396 scopus 로고
    • A single-chip 2B1Q U-interface transceiver
    • Dec.
    • R. Colbeck et al., “A single-chip 2B1Q [/-interface transceiver,” IEEEJ. Solid-State Circuits, vol. 24, no. 6, pp. 1614–1624, Dec. 1989.
    • (1989) IEEEJ. Solid-State Circuits , vol.24 , Issue.6 , pp. 1614-1624
    • Colbeck, R.1
  • 3
    • 0024898757 scopus 로고
    • An ANSI standard ISDN transceiver chip set
    • Feb.
    • H. Khorramabadi et al., “An ANSI standard ISDN transceiver chip set,” in ISSCC Dig. Tech. Papers, Feb. 1989, pp. 256–257.
    • (1989) ISSCC Dig. Tech. Papers , pp. 256-257
    • Khorramabadi, H.1
  • 4
    • 0025549087 scopus 로고
    • Mixed digital/analog signal processing for single-chip 2B 1Q U-interface transceiver
    • Dec.
    • R. Batruni, P. Lemaitre, and T. Fensch, “Mixed digital/analog signal processing for single-chip 2B1Q U-interface transceiver,” IEEE J. Solid-State Circuits, vol. 25, no. 6, pp. 1414–1425, Dec. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.6 , pp. 1414-1425
    • Batruni, R.1    Lemaitre, P.2    Fensch, T.3
  • 5
    • 0025560090 scopus 로고
    • Analog front end of an ECBM transceiver for ISDN
    • Dec.
    • R. Castello et al., “Analog front end of an ECBM transceiver for ISDN,” IEEE J. Solid-State Circuits, vol. 25, no. 6, pp. 1575–1585, Dec. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.6 , pp. 1575-1585
    • Castello, R.1
  • 6
    • 84939340094 scopus 로고
    • A monolithic p-channel JFET quad op amp in-package trim and enhanced gain-bandwidth product
    • Dec.
    • R. L. Vyne et al., “A monolithic p-channel JFET quad op amp in-package trim and enhanced gain-bandwidth product,” IEEE J. Solid-State Circuits, vol. SC-22, pp. 1130–1138, Dec. 1987.
    • (1990) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 1130-1138
    • Vyne, R.L.1
  • 7
    • 0025445459 scopus 로고
    • A 500-nA sixth-order SC filter
    • June
    • R. Castello et al “A 500-nA sixth-order SC filter,” IEEE J. Solid-State Circuits, vol. 25, pp. 669–676, June 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.669 , Issue.676
    • Castello, R.1
  • 8
    • 0022313711 scopus 로고
    • Low-voltage operational amplifier with rail-to-rail input and output ranges
    • Dec.
    • J. H. Huijsing and D. Linebarger, “Low-voltage operational amplifier with rail-to-rail input and output ranges,” IEEE J. Solid-State Circuits, vol. SC-20, pp. 1144–1150, Dec. 1985.
    • (1985) IEEE J. Solid-State Circuits , vol.SC-20 , pp. 1144-1150
    • Huijsing, J.H.1    Linebarger, D.2
  • 9
    • 0025384745 scopus 로고
    • A CMOS large-swing low-distortion three-stage class AB power amplifier
    • Feb.
    • F. N. Op’t Eynde et al., “A CMOS large-swing low-distortion three-stage class AB power amplifier,” IEEE J. Solid-State Circuits, vol. 25, pp. 265–273, Feb. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 265-273
    • Op’t Eynde, F.N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.