Design verification and reachability analysis using algebraic manipulation

IEEE International Conference on Computer Design - VLSI in Computers and Processors

Volumn , Issue , 1991, Pages 250-258

  Devadas, Srinivas ^a   Kentzer, Kurt ^a   Krishnakumar, A S ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); ELECTRIC NETWORK SYNTHESIS; LINEAR ALGEBRA; LOGIC CIRCUITS; THEOREM PROVING;

ALGEBRAIC MANIPULATION; DESIGN VERIFITCATION; HIGHER-ORDER LOGIC; REACHABILITY ANALYSIS; TEMPORAL LOGIC;

LOGIC DESIGN;

EID: 0026294811     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)