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Volumn 26, Issue 11, 1991, Pages 1689-1699

A Nonlinear CMOS Analog Cell for VLSI Signal and Information Processing

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, VLSI--APPLICATIONS; SIGNAL PROCESSING--APPLICATIONS;

EID: 0026260438     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.98991     Document Type: Article
Times cited : (53)

References (26)
  • 4
    • 0022104645 scopus 로고
    • Integrated MOS four-quadrant analog multiplier using switched capacitor technology for analog signal processing IC's
    • Aug.
    • M. Yasumoto and T. Enomoto, “Integrated MOS four-quadrant analog multiplier using switched capacitor technology for analog signal processing IC’s,” IEEE J. Solid-State Circuits, vol. SC-20, pp. 852–859, Aug. 1985.
    • (1985) IEEE J. Solid-State Circuits , vol.SC-20 , pp. 852-859
    • Yasumoto, M.1    Enomoto, T.2
  • 5
    • 0022331933 scopus 로고
    • A 20-V four-quadrant CMOS analog multiplier
    • J. Babanezhad and G. C. Temes, “A 20-V four-quadrant CMOS analog multiplier,” IEEE J. Solid State Circuits, vol. SC-20, pp. 1158–1168, 1985.
    • (1985) IEEE J. Solid State Circuits , vol.SC-20 , pp. 1158-1168
    • Babanezhad, J.1    Temes, G.C.2
  • 6
    • 84939726935 scopus 로고
    • CAD-compatible analog system design: A new design concept
    • M. Ismail and J. Franca, Eds. Boston: Kluwer Academic, ch. 7.
    • M. Ismail, “CAD-compatible analog system design: A new design concept,” in Introduction to Analog VLSI Design Automation, M. Ismail and J. Franca, Eds. Boston: Kluwer Academic, 1990, ch. 7.
    • (1990) Introduction to Analog VLSI Design Automation
    • Ismail, M.1
  • 7
    • 0022665550 scopus 로고
    • Continuous-time MOSFET-C filters in VLSI
    • Feb.
    • Y. Tsividis, M. Banu, and J. Khoury, “Continuous-time MOSFET-C filters in VLSI,” IEEE Trans. Circuits Syst., vol. CAS-33, no. 7, pp. 125–140, Feb. 1986.
    • (1986) IEEE Trans. Circuits Syst , vol.CAS-33 , Issue.7 , pp. 125-140
    • Tsividis, Y.1    Banu, M.2    Khoury, J.3
  • 8
    • 0023410009 scopus 로고
    • Four-transistor continuous-time MOS transconductor
    • 24 Sept.
    • M. Ismail, “Four-transistor continuous-time MOS transconductor,” Electron. Lett., vol. 23, pp. 1099–1100, Sept. 24, 1987.
    • (1987) Electron. Lett , vol.23 , pp. 1099-1100
    • Ismail, M.1
  • 9
    • 84893716879 scopus 로고
    • A new MOSFET-C universal filter structure for VLSI
    • M. Ismail, S. V. Smith, and R. G. Beale, “A new MOSFET-C universal filter structure for VLSI,” IEEE J. Solid-State Circuits, vol. 23, pp. 183–194, 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , pp. 183-194
    • Ismail, M.1    Smith, S.V.2    Beale, R.G.3
  • 10
    • 0024965825 scopus 로고
    • MOS multiplier/divider cell for analogue VLSI
    • Nov. 9
    • N. I. Khachab and M. Ismail, “MOS multiplier/divider cell for analogue VLSI,” Electron. Lett., vol. 25, pp. 1550–1551, Nov. 9, 1989.
    • (1989) Electron. Lett , vol.25 , pp. 1550-1551
    • Khachab, N.I.1    Ismail, M.2
  • 11
    • 3342935406 scopus 로고
    • Analog CMOS nonlinear cells and their applications in VLSI signal and information processing
    • Ph.D. dissertation
    • N. I. Khachab, “Analog CMOS nonlinear cells and their applications in VLSI signal and information processing,” Ph.D. dissertation, Ohio State Univ., Columbus, 1990.
    • (1990) Ohio State Univ., Columbus
    • Khachab, N.I.1
  • 12
    • 0022707050 scopus 로고
    • CMOS RF circuits for data communications applications
    • B. S. Song, “CMOS RF circuits for data communications applications,” IEEE J. Solid-State Circuits, vol. SC-21, pp. 310–317, 1986.
    • (1986) IEEE J. Solid-State Circuits , vol.SC-21 , pp. 310-317
    • Song, B.S.1
  • 13
    • 0023233426 scopus 로고
    • Novel continuous-time all MOS four-quadrant multipliers
    • May
    • N. I. Khachab and M. Ismail, “Novel continuous-time all MOS four-quadrant multipliers,” in Proc. IEEE Int. Symp. Circuits Syst., May 1987, pp. 762–765.
    • (1987) Proc. IEEE Int. Symp. Circuits Syst , pp. 762-765
    • Khachab, N.I.1    Ismail, M.2
  • 14
    • 0024887640 scopus 로고
    • An analog MOS implementation of the synaptic weights for feedback neural nets
    • May
    • F. M. Salam, N. I. Khachab, M. Ismail, and Y. Wang, “An analog MOS implementation of the synaptic weights for feedback neural nets,” in Proc. IEEE Int. Symp. Circuits Syst., May 1989, pp. 1223–1226.
    • (1989) Proc. IEEE Int. Symp. Circuits Syst , pp. 1223-1226
    • Salam, F.M.1    Khachab, N.I.2    Ismail, M.3    Wang, Y.4
  • 15
    • 0022721216 scopus 로고
    • Simple neural optimization networks: An A/D converter, a signal decision circuit and a linear programming circuit
    • May
    • D. W. Tank and J. J. Hopfield, “Simple neural optimization networks: An A/D converter, a signal decision circuit and a linear programming circuit,” IEEE Trans. Circuits Syst., vol. CAS-33, no. 5, pp. 533–541, May 1986.
    • (1986) IEEE Trans. Circuits Syst , vol.CAS-33 , Issue.5 , pp. 533-541
    • Tank, D.W.1    Hopfield, J.J.2
  • 16
    • 0011709905 scopus 로고
    • Issues in analog VLSI and MOS techniques for neural computing
    • C. Mead and M. Ismail, Eds. Boston: Kluwer Academic ch. 5
    • S. Bibyk and M. Ismail, “Issues in analog VLSI and MOS techniques for neural computing,” in Analog VLSI Implementation of Neural Systems, C. Mead and M. Ismail, Eds. Boston: Kluwer Academic, 1989, ch. 5.
    • (1989) Analog VLSI Implementation of Neural Systems
    • Bibyk, S.1    Ismail, M.2
  • 17
    • 0024931957 scopus 로고
    • Programmable vector-matrix multiplier for artificial neural networks
    • May
    • F. J. Kub, I. A. Mack, and K. K. Moon, “Programmable vector-matrix multiplier for artificial neural networks,” in Proc. VLSI Circuits Symp., May 1989, pp. 97–98.
    • (1989) Proc. VLSI Circuits Symp , pp. 97-98
    • Kub, F.J.1    Mack, I.A.2    Moon, K.K.3
  • 18
    • 0025445432 scopus 로고
    • Artificial neural networks using MOS analog multipliers
    • June
    • P. W. Hollis and J. J. Paulos, “Artificial neural networks using MOS analog multipliers,” IEEE J. Solid-State Circuits, vol. 25, pp. 849–855, June 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 849-855
    • Hollis, P.W.1    Paulos, J.J.2
  • 19
    • 0024479801 scopus 로고
    • Practical design and analysis of a simple “neural” optimization circuit
    • Jan.
    • M. J. S. Smith and C. L. Portian, “Practical design and analysis of a simple “neural” optimization circuit,” IEEE Trans. Circuits Syst., vol. 36, no. 1, pp. 42–50, Jan. 1989.
    • (1989) IEEE Trans. Circuits Syst , vol.36 , Issue.1 , pp. 42-50
    • Smith, M.J.S.1    Portian, C.L.2
  • 20
  • 21
    • 84939726482 scopus 로고    scopus 로고
    • Analog floating-gate synapses for general purpose VLSI neural computations
    • to be published
    • B. W. Lee, H. Yang, and B. J. Sheu, “Analog floating-gate synapses for general purpose VLSI neural computations,” to be published.
    • Lee, B.W.1    Yang, H.2    Sheu, B.J.3
  • 22
    • 0025414349 scopus 로고
    • Programmable current-mode neural network for implementation in analogue MOS VLSI
    • pt. G. Apr.
    • T. H. Borgstrom, M. Ismail, and S. B. Bibyk, “Programmable current-mode neural network for implementation in analogue MOS VLSI,” Proc. Inst. Elec. Eng., vol. 137, pt. G. no. 4, pp. 175–184, Apr. 1990.
    • (1990) Proc. Inst. Elec. Eng , vol.137 , Issue.4 , pp. 175-184
    • Borgstrom, T.H.1    Ismail, M.2    Bibyk, S.B.3
  • 24
    • 33746159118 scopus 로고
    • Design and fabrication of VLSI components for a general purpose analog neural computer
    • C. Mead and M. Ismail, Eds. Boston: Kluwer Academic, ch. 6
    • P. Mueller et al., “Design and fabrication of VLSI components for a general purpose analog neural computer,” in Analog VLSI Implementation of Neural Systems, C. Mead and M. Ismail, Eds. Boston: Kluwer Academic, 1989, ch. 6.
    • (1989) Analog VLSI Implementation of Neural Systems
    • Mueller, P.1
  • 25
    • 0025587194 scopus 로고
    • A folded-cascode CMOS operational amplifier with slew rate enhancement circuit
    • May
    • S. Sakurai, Z. R. Zarabadi, and M. Ismail, “A folded-cascode CMOS operational amplifier with slew rate enhancement circuit,” in Proc. IEEE Int. Symp. Circuits Syst., May 1990, pp. 3205–3208.
    • (1990) Proc. IEEE Int. Symp. Circuits Syst , pp. 3205-3208
    • Sakurai, S.1    Zarabadi, Z.R.2    Ismail, M.3
  • 26
    • 0024959501 scopus 로고
    • High-speed division unit using asymmetric neural network architecture
    • Mar. 2
    • H. Huang and P. Siy, “High-speed division unit using asymmetric neural network architecture,” Electron. Lett., vol. 25, no. 5, pp. 344–345, Mar. 2, 1989.
    • (1989) Electron. Lett , vol.25 , Issue.5 , pp. 344-345
    • Huang, H.1    Siy, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.