Pmos Transistors in Lpcvd Polycrystalline Silicon-Germanium Films

IEEE Electron Device Letters

Volumn 12, Issue 11, 1991, Pages 584-586

  King, Tsu Jae ^a   Saraswat, Krishna C ^a   Pfiester, James R ^b  

^a STANFORD UNIVERSITY   (United States)

^b MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CRYSTALS; SEMICONDUCTING FILMS--CHEMICAL VAPOR DEPOSITION; SEMICONDUCTING SILICON--THIN FILMS;

PMOS TRANSISTORS; THIN FILM TRANSISTORS;

TRANSISTORS;

EID: 0026258009     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.119205     Document Type: Article

References (12)

1. W. G. Hawkins, “Polycrystalline-silicon device technology for large-area electronics,” IEEE Trans. Electron Devices, vol. ED-33, no. 4, pp. 477–481, 1986.
2. S. D. S. Malhi et al., “Characteristics and three-dimensional integration of MOSFET's in small-grain LPCVD polycrystalline silicon,” IEEE Trans. Electron Devices, vol. ED-32, no. 2, pp. 258–281, 1985.
3. T.-J. King, J. R. Pfiester, J. D. Shott, J. P. McVittie, and K. C. Saraswat, “A polycrystalline-Si1-xGex-gate CMOS technology,” in IEDM Tech. Dig., 1990, pp. 253–256.
4. T. P. Pearsall, “Silicon-germanium alloys and heterostructures: optical and electronic properties,” CRC Crit. Rev. Solid State Mater. Sci., vol. 15, no. 6, pp. 551–600, 1989.
5. A. G. Lewis et al., “Small geometry effects in n- and p-channel polysilicon thin film transistors,” in IEDM Tech. Dig., 1988, pp. 260–263.
6. J. G. Fossum, A. Ortiz-Conde, H. Shichijo, and S. K. Banerjee, “Anomalous leakage current in LPCVD polysilicon MOSFET's,” IEEE Trans. Electron Devices, vol. ED-32, no. 9, pp. 1878–1884, 1985.
7. B. Faughnan and A. C. Ipri, “A study of hydrogen passivation of grain boundaries in polysilicon thin-film transistors,” IEEE Trans. Electron Devices, vol. 36, no. 1, pp. 101–107, 1989.
8. M. Hack and A. G. Lewis, “Avalanche-induced effects in polysilicon thin-film transistors,” IEEE Electron Device Lett., vol. 12, no. 5, pp. 203–205, 1991.
9. N. Yamauchi, J.J.-J. Hajjar, and R. Reif, “Polysilicon thin-film transistors with channel length and width comparable to or smaller than the grain size of the thin film,” IEEE Trans Electron Devices, vol. 38, no. 1, pp. 55–60, 1991.
10. T. Unagami and T. Takeshita, “High-performance poly-Si TFT's with ECR-plasma hydrogen passivation,” IEEE Trans. Electron Devices, vol. 36, no. 3, pp. 529–533, 1989.
11. S. Ikeda et al., “A polysilicon transistor technology for large capacity SRAMs,” in IEDM Tech. Dig., 1990, pp. 469–472.
12. H. Ohshima and S. Morozumi, “Future trends for TFT integrated circuits on glass substrates,” in IEDM Tech. Dig., 1989, pp. 157–160.