Direct Evidence of Gate Oxide Thickness Increase in Tungsten Polycide Processes

IEEE Electron Device Letters

Volumn 12, Issue 11, 1991, Pages 623-625

  Hsu, S L ^a   Liu, L M ^a   Lin, M S ^a   Chang, C Y ^b  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

MASS SPECTROMETRY; MICROSCOPIC EXAMINATION--TRANSMISSION ELECTRON MICROSCOPY; TUNGSTEN COMPOUNDS;

GATE OXIDES; TUNGSTEN POLYCIDE PROCESSES;

INTEGRATED CIRCUITS, CMOS;

EID: 0026254958     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.119218     Document Type: Article

References (4)

1. C. S. Yoo, T. H. Lin, and N. S. Tsai, “Si/W changes and film peeling during polycide annealing,” Japan. J. Appl. Phys., vol. 29, pp. 2535–2540, 1990.
2. J. Wright and K. C. Saraswat, “The effect of fluorine in silicon dioxide gate dielectrics,” IEEE Trans. Electron Devices, vol. 36, pp. 879–889, 1989.
3. Y. Shioya, S. Kawamura, I. Kobayashi, M. Madeda, and K. Yanagida, “Effect of fluorine in chemical-vapor-deposited tungsten silicide film on electrical breakdown of SiO2 film,” J. Appl. Phys., vol. 61, pp. 5102–5109, 1987.
4. R. A. Chapman et al., “0.5 micron CMOS for high performance at 33 V,” in IEDM Tech. Dig., 1988, pp. 52–55.