-
1
-
-
0014596187
-
Complementary MOS-bipolar transistor structure
-
H. C. Lin, J. C. Ho, R. R. Iyer, and K. Kwong, “Complementary MOS-bipolar transistor structure,” IEEE Trans. Electron Devices., vol. ED-16, pp. 945–951, 1969.
-
(1969)
IEEE Trans. Electron Devices.
, vol.ED-16
, pp. 945-951
-
-
Lin, H.C.1
Ho, J.C.2
Iyer, R.R.3
Kwong, K.4
-
3
-
-
0018480071
-
A high speed low power Hi-CMOS 4K static RAM
-
O. Minato, T. Masuhara, T. Sasaki, Y. Sakai, M. Kubo, K. Uchibori, and T. Yasui, “A high speed low power Hi-CMOS 4K static RAM,” IEEE Trans. Electron Devices, vol. ED-26, pp. 882–885. 1979.
-
(1979)
IEEE Trans. Electron Devices
, vol.ED-26
, pp. 882-885
-
-
Minato, O.1
Masuhara, T.2
Sasaki, T.3
Sakai, Y.4
Kubo, M.5
Uchibori, K.6
Yasui, T.7
-
4
-
-
0020761607
-
Silicon-on-insulator bipolar transistors
-
M. Rodder and D. A. Antoniadis, “Silicon-on-insulator bipolar transistors,” IEEE Electron Device Lett., vol. EDL-4, pp. 193–195, 1983.
-
(1983)
IEEE Electron Device Lett.
, vol.EDL-4
, pp. 193-195
-
-
Rodder, M.1
Antoniadis, D.A.2
-
5
-
-
0020795637
-
Fully isolated lateral bipolar-MOS transistors fabricated in zonemelting recrystallized Si films on SiO2
-
B-Y. Tsaur, D. J. Silversmith, J. C. C. Fan, and R. W. Mountain. “Fully isolated lateral bipolar-MOS transistors fabricated in zonemelting recrystallized Si films on SiO 2,” IEEE Electron Device Lett., vol. EDL-4, pp. 269–271, 1983.
-
(1983)
IEEE Electron Device Lett.
, vol.EDL-4
, pp. 269-271
-
-
Tsaur, B.-Y.1
Silversmith, D.J.2
Fan, J.C.C.3
Mountain, R.W.4
-
6
-
-
0023315140
-
A lateral silicon-on-insulator bipolar transistor with a self-aligned base contact
-
J. C. Sturm, J. P. McVittie, J. F. Gibbons, and L. Pfeiffer, “A lateral silicon-on-insulator bipolar transistor with a self-aligned base contact,” IEEE Electron Device Lett., vol. EDL-8, pp. 104–106, 1987.
-
(1987)
IEEE Electron Device Lett.
, vol.EDL-8
, pp. 104-106
-
-
Sturm, J.C.1
McVittie, J.P.2
Gibbons, J.F.3
Pfeiffer, L.4
-
7
-
-
0023330767
-
An SOI voltage controlled bipolar-MOS device
-
J-P. Colinge, “An SOI voltage controlled bipolar-MOS device,” IEEE Trans. Electron Devices, vol. Ed-34, pp. 845–849, 1987.
-
(1987)
IEEE Trans. Electron Devices
, vol.Ed-34
, pp. 845-849
-
-
Colinge, J.-P.1
-
8
-
-
0020769729
-
MOS transistors operated in the lateral bipolar mode and their applications in CMOS technology
-
E. A. Vittoz, “MOS transistors operated in the lateral bipolar mode and their applications in CMOS technology,” IEEE J. Solid-State Circuits, vol. SC-18, pp. 273–279, 1983.
-
(1983)
IEEE J. Solid-State Circuits
, vol.SC-18
, pp. 273-279
-
-
Vittoz, E.A.1
-
9
-
-
0021445655
-
The design of high-performance analog circuits on digital CMOS chips
-
E. A. Vittoz, “The design of high-performance analog circuits on digital CMOS chips,” IEEE J. Solid-State Circuits, vol. SC-20, pp. 657–665, 1985.
-
(1985)
IEEE J. Solid-State Circuits
, vol.SC-20
, pp. 657-665
-
-
Vittoz, E.A.1
-
10
-
-
0022291042
-
CMOS voltage references using lateral bipolar transistors
-
M. G. R. Degrauwe, O. N. Leuthold, E. A. Vittoz, H. J. Oguey, and A. Descombes, “CMOS voltage references using lateral bipolar transistors,” IEEE J. Solid-State Circuits, vol. SC-20, pp. 1151 — 1157, 1985.
-
(1985)
IEEE J. Solid-State Circuits
, vol.SC-20
, pp. 1151-1157
-
-
Degrauwe, M.G.R.1
Leuthold, O.N.2
Vittoz, E.A.3
Oguey, H.J.4
Descombes, A.5
-
11
-
-
0023329975
-
Design considerations for a high performance 3-µm CMOS analog standard-cell library
-
C. A. Laber, C. F. Rahim, S. F. Dreyer, G. T. Uehara, P. T. Kwok, and P. R. Gray, “Design considerations for a high performance 3-µm CMOS analog standard-cell library,” IEEE J. Solid-State Circuits, vol. SC-22, pp. 181–189, 1987.
-
(1987)
IEEE J. Solid-State Circuits
, vol.SC-22
, pp. 181-189
-
-
Laber, C.A.1
Rahim, C.F.2
Dreyer, S.F.3
Uehara, G.T.4
Kwok, P.T.5
Gray, P.R.6
-
12
-
-
0022735814
-
Precision compressor gain control in CMOS technology
-
X. Arreguit, E. A. Vittoz, and M. Merz, “Precision compressor gain control in CMOS technology,” IEEE J. Solid-State Circuits, vol. SC-22, pp. 442–445, 1987.
-
(1987)
IEEE J. Solid-State Circuits
, vol.SC-22
, pp. 442-445
-
-
Arreguit, X.1
Vittoz, E.A.2
Merz, M.3
-
13
-
-
0024719764
-
A 50-dB variable gain amplifier using parasitic bipolar transistors in CMOS
-
T. W. Pan, and A. A. Abidi, “A 50-dB variable gain amplifier using parasitic bipolar transistors in CMOS,” IEEE J. Solid-State Circuits, vol. 24, pp. 951–961, 1989.
-
(1989)
IEEE J. Solid-State Circuits
, vol.24
, pp. 951-961
-
-
Pan, T.W.1
Abidi, A.A.2
-
14
-
-
0024176886
-
High gain lateral bipolar transistor
-
in
-
S. Verdonckt-Vandebroek, S. S. Wong, and P. K. Ko, “High gain lateral bipolar transistor,” in IEDM Tech. Dig., 1988, pp. 406–409.
-
(1988)
IEDM Tech. Dig.
, pp. 406-409
-
-
Verdonckt-Vandebroek, S.1
Wong, S.S.2
Ko, P.K.3
-
15
-
-
0016497460
-
Field-effect transistor versus analog transistor (static induction transistor)
-
J. Nishizawa, T. Terasaki, and J. Shibata, “Field-effect transistor versus analog transistor (static induction transistor),” IEEE Trans. Electron Devices, vol. ED-22, pp. 185–197, 1975.
-
(1975)
IEEE Trans. Electron Devices
, vol.ED-22
, pp. 185-197
-
-
Nishizawa, J.1
Terasaki, T.2
Shibata, J.3
-
16
-
-
0019636224
-
Small geometry depleted base bipolar transistors (BSIT)-VLSI devices?
-
J. M. C. Stork and J. D. Plummer, “Small geometry depleted base bipolar transistors (BSIT)-VLSI devices?” IEEE Trans. Electron Devices, vol. ED-28, pp. 1354–1363, 1981.
-
(1981)
IEEE Trans. Electron Devices
, vol.ED-28
, pp. 1354-1363
-
-
Stork, J.M.C.1
Plummer, J.D.2
-
17
-
-
0023315689
-
HPSAC—A silicided amorphous-silicon contact and interconnect technology for VLSI
-
S. S. Wong, D. C. Chen, P. Merchant, T. R. Cass, J. Amano, and K. Y. Chiu, “HPSAC—A silicided amorphous-silicon contact and interconnect technology for VLSI,” IEEE Trans. Electron Devices, vol. ED-34, pp. 587–592, 1987.
-
(1987)
IEEE Trans. Electron Devices
, vol.ED-34
, pp. 587-592
-
-
Wong, S.S.1
Chen, D.C.2
Merchant, P.3
Cass, T.R.4
Amano, J.5
Chiu, K.Y.6
-
18
-
-
0023315562
-
Titanium nitride local interconnect technology for VLSI
-
T. E. Tang, C. Wei, R. A. Haken, T. C. Holloway, L. R. Hite, and T. G. W. Blake, “Titanium nitride local interconnect technology for VLSI,” IEEE Trans. Electron Devices, vol. ED-34, pp. 682–688, 1987.
-
(1987)
IEEE Trans. Electron Devices
, vol.ED-34
, pp. 682-688
-
-
Tang, T.E.1
Wei, C.2
Haken, R.A.3
Holloway, T.C.4
Hite, L.R.5
Blake, T.G.W.6
-
20
-
-
0019300422
-
A symmetrical bipolar structure
-
in
-
D. D. Tang, V. J. Silvestri, H. N. Yu, and A. Reisman, “A symmetrical bipolar structure,” in IEDM Tech. Dig., 1980, pp. 58–60.
-
(1980)
IEDM Tech. Dig.
, pp. 58-60
-
-
Tang, D.D.1
Silvestri, V.J.2
Yu, H.N.3
Reisman, A.4
-
21
-
-
0019392705
-
Heavy doping effects in silicon
-
R. P. Mertens, R. J. Van Overstraeten, and H. J. De Man. “Heavy doping effects in silicon,” Adv. Electron. Electron Phys., vol. 55. pp. 77–118, 1981.
-
(1981)
Adv. Electron. Electron Phys.
, vol.55
, pp. 77-118
-
-
Mertens, R.P.1
Van Overstraeten, R.J.2
De Man, H.J.3
-
22
-
-
0022327360
-
Simultaneous measurements of hole lifetime, hole mobility and bandgap narrowing in heavily doped n-type silicon
-
in
-
J. del Alamo, S. Swirhun, and R. M. Swanson, “Simultaneous measurements of hole lifetime, hole mobility and bandgap narrowing in heavily doped n-type silicon,” in IEDM Tech. Dig., 1985, pp. 290–293.
-
(1985)
IEDM Tech. Dig.
, pp. 290-293
-
-
del Alamo, J.1
Swirhun, S.2
Swanson, R.M.3
-
23
-
-
0016508537
-
First-order theory of MOSFET hybrid-mode operation
-
B. L. Hart and R. W. J. Barker, “First-order theory of MOSFET hybrid-mode operation,” Int, J. Electron., vol. 38, pp. 625–630, 1975.
-
(1975)
Int, J. Electron.
, vol.38
, pp. 625-630
-
-
Hart, B.L.1
Barker, R.W.J.2
-
24
-
-
0000399778
-
Characterization of a high resolution novolak based negative resist with 4 µC/cm2 sensitivity
-
H. Liu, M. P. de Grandpre, and W. E. Feely, “Characterization of a high resolution novolak based negative resist with 4 μ C/cmsensitivity,” J. Vac. Sci. Technol., vol. B6, no. 1, pp. 379–387, 1988.
-
(1988)
J. Vac. Sci. Technol.
, vol.B6
, Issue.1
, pp. 379-387
-
-
Liu, H.1
de Grandpre, M.P.2
Feely, W.E.3
-
25
-
-
0024069804
-
Anisotropic reactive ion etching of MoSi2 and in situ doped n+ and p' polysilicon using Cl2 and BCl3
-
T. C. Mele, S. C. Arney, J. P. Krusius, and N. C. MacDonald, “Anisotropic reactive ion etching of MoSi 2 and in situ doped n + and p' polysilicon using Cl 2 and BCl 3” J. Electrochem. Soc., vol. 135, pp. 2373–2378, 1988.
-
(1988)
J. Electrochem. Soc.
, vol.135
, pp. 2373-2378
-
-
Mele, T.C.1
Arney, S.C.2
Krusius, J.P.3
MacDonald, N.C.4
-
26
-
-
0019048875
-
Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces
-
S. C. Sun, and J. D. Plummer, “Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces,” IEEE Trans. Electron Devices, vol. ED-27, pp. 1497–1508, 1980.
-
(1980)
IEEE Trans. Electron Devices
, vol.ED-27
, pp. 1497-1508
-
-
Sun, S.C.1
Plummer, J.D.2
-
27
-
-
0017503796
-
CMOS analog integrated circuits based on weak inversion operation
-
E. A. Vittoz and J. Fellrath, “CMOS analog integrated circuits based on weak inversion operation,” IEEE J. Solid-State Circuits, vol. SC-12, pp. 224–231, 1977.
-
(1977)
IEEE J. Solid-State Circuits
, vol.SC-12
, pp. 224-231
-
-
Vittoz, E.A.1
Fellrath, J.2
-
28
-
-
0015600404
-
The insulated-gate field-effect transistor—A bipolar transistor in disguise
-
E. O. Johnson, “The insulated-gate field-effect transistor—A bipolar transistor in disguise,” RCA Rev., vol. 34, pp. 80–94, 1973.
-
(1973)
RCA Rev.
, vol.34
, pp. 80-94
-
-
Johnson, E.O.1
-
29
-
-
0017466169
-
Very small MOSFETs for low temperature operation
-
F. H. Gaensslen, V. L. Rideout, E. J. Walker, and J. J. Walker, “Very small MOSFETs for low temperature operation,” IEEE Trans. Electron Devices, vol. ED-24, pp. 218–229, 1977.
-
(1977)
IEEE Trans. Electron Devices
, vol.ED-24
, pp. 218-229
-
-
Gaensslen, F.H.1
Rideout, V.L.2
Walker, E.J.3
Walker, J.J.4
-
30
-
-
0023112558
-
Performance and hot-carrier effects of small cryo CMOS devices
-
M. Aoki, S. Hanamura, T. Masuhara, and K. Yano, “Performance and hot-carrier effects of small cryo CMOS devices” IEEE Trans. Electron Devices, vol. ED-34, pp. 8–18. 1987.
-
(1987)
IEEE Trans. Electron Devices
, vol.ED-34
, pp. 8-18
-
-
Aoki, M.1
Hanamura, S.2
Masuhara, T.3
Yano, K.4
-
31
-
-
0019569281
-
The effect of base doping on the performance of Si bipolar transistors at low temperatures
-
W. P. Dumke, “The effect of base doping on the performance of Si bipolar transistors at low temperatures,” IEEE Trans. Electron Devices, vol. ED-28, pp. 494–500, 1981.
-
(1981)
IEEE Trans. Electron Devices
, vol.ED-28
, pp. 494-500
-
-
Dumke, W.P.1
-
32
-
-
0024055906
-
Optimization of silicon bipolar transistors for high current gain at low temperatures
-
J. C. S. Woo and J. D. Plummer, “Optimization of silicon bipolar transistors for high current gain at low temperatures,” IEEE Trans. Electron Devices, vol. 35, pp. 1311–1321, 1988.
-
(1988)
IEEE Trans. Electron Devices
, vol.35
, pp. 1311-1321
-
-
Woo, J.C.S.1
Plummer, J.D.2
-
33
-
-
0024718844
-
Base profile design for high performance operation of silicon bipolar transistors at liquid-nitrogen temperature
-
J. M. C. Stork, D. L. Harame, B. S. Meyerson, and T. N. Nguyen. “Base profile design for high performance operation of silicon bipolar transistors at liquid-nitrogen temperature,” IEEE Trans. Electron Devices, vol. 36, pp. 1503–1509, 1989.
-
(1989)
IEEE Trans. Electron Devices
, vol.36
, pp. 1503-1509
-
-
Stork, J.M.C.1
Harame, D.L.2
Meyerson, B.S.3
Nguyen, T.N.4
-
34
-
-
0024915841
-
Lateral NPN bipolar transistor for high current gain applications at reduced temperatures
-
in
-
J. C. S. Woo, S. S. Wong, S. Verdonckt-Vandebroek, P. Ko, K. Terrill, and P. K. Vasudev, “Lateral NPN bipolar transistor for high current gain applications at reduced temperatures,” in Proc. Bipolar Circuit and Technology Meet., 1989, pp. 152–155.
-
(1989)
Proc. Bipolar Circuit and Technology Meet.
, pp. 152-155
-
-
Woo, J.C.S.1
Wong, S.S.2
Verdonckt-Vandebroek, S.3
Ko, P.4
Terrill, K.5
Vasudev, P.K.6
|