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Volumn 32, Issue 4, 1991, Pages 569-575
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Minimum skew and minimum path length routing in VLSI layout design
a
a
NEC CORPORATION
(Japan)
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER PROGRAMMING--ALGORITHMS;
ELECTRIC NETWORKS--TOPOLOGY;
BOTTOM-UP ROUTING;
MINIMUM SKEW;
PATH LENGTH ROUTING;
ROUTING ALGORITHMS;
INTEGRATED CIRCUITS, VLSI;
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EID: 0026244347
PISSN: 0547051X
EISSN: None
Source Type: Report
DOI: None Document Type: Report |
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Times cited : (23)
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References (2)
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