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Volumn 38, Issue 7, 1991, Pages 1650-1654

Breakdown Voltage Enhancement for Devices on Thin Silicon Layer/Silicon Dioxide Film

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN; FILMS--DIELECTRIC; OXIDES--THIN FILMS;

EID: 0026188097     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.85162     Document Type: Article
Times cited : (102)

References (8)
  • 1
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    • J. D. Beasom, “A process for simultaneous fabrication of vertical NPN and PNP’s, Nch and Pch MOS devices.” in 1973 IEEE IEDM Tech. Dig., pp. 41–43.
    • 1973 IEEE IEDM Tech. Dig. , pp. 41-43
    • Beasom, J.D.1
  • 2
    • 0022987204 scopus 로고    scopus 로고
    • Improved dielectrically isolated device integration by silicon-wafer direct-bonding (SDB) technique
    • H. Ohashi, J. Ohura. T. Tsukakoshi, and M. Shimbo, “Improved dielectrically isolated device integration by silicon-wafer direct-bonding (SDB) technique,” in 1986 IEEE IEDM Tech. Dig., p. 210.
    • 1986 IEEE IEDM Tech. Dig. , pp. 210
    • Ohashi, H.1    Ohura, J.2
  • 3
    • 0024629436 scopus 로고
    • Increased junction breakdown voltages in silicon-on-insulator diodes
    • H. C. Chen, S. S. Li, R. M. Fox. and W. A. Krull, “Increased junction breakdown voltages in silicon-on-insulator diodes,” IEEE Trans. Electron Devices, vol. 36, pp. 488–492, 1989.
    • (1989) IEEE Trans. Electron Devices , vol.36 , pp. 488-492
    • Chen, H.C.1    Li, S.S.2    Fox, R.M.3
  • 5
    • 84872850476 scopus 로고
    • A breakdown voltage simulator for semiconductor devices with depleted floating regions
    • I. Omura and A. Nakagawa. “A breakdown voltage simulator for semiconductor devices with depleted floating regions,” in Proc. 6th NASECODE. 1989, pp. 372–377.
    • (1989) Proc. 6th NASECODE , pp. 372-377
    • Omura, I.1    Nakagawa, A.2
  • 6
    • 21544462953 scopus 로고
    • Silicon-to-silicon direct bonding method
    • M. Shimbo, K. Furukawa, K. Fukuda, and K. Tanzawa, “Silicon-to-silicon direct bonding method,” J. Appl. Phys., vol. 60, pp. 2987–2989, 1986.
    • (1986) J. Appl. Phys. , vol.60 , pp. 2987-2989
    • Shimbo, M.1    Furukawa, K.2    Fukuda, K.3    Tanzawa, K.4
  • 7
    • 0014778389 scopus 로고
    • Measurement of the ionization rates in diffused silicon p-n junctions
    • R. Van Overstraten and H. De Man, “Measurement of the ionization rates in diffused silicon p-n junctions,” Solid-State Electron., vol. 12, pp. 583–608, 1970.
    • (1970) Solid-State Electron. , vol.12 , pp. 583-608
    • Van, R.1
  • 8
    • 0024170932 scopus 로고
    • Two types of 500 V double gate lateral N-ch bipolar-mode MOSFETs in dielectrically isolated P and N silicon islands
    • A. Nakagawa, Y. Yamaguchi, K. Watanabe, and T. Ogura, “Two types of 500 V double gate lateral N-ch bipolar-mode MOSFETs in dielectrically isolated P and N silicon islands,” in 1988 IEEE IEDM Tech. Dig., pp. 817–820.
    • (1988) 1988 IEEE IEDM Tech. Dig. , pp. 817-820
    • Nakagawa, A.1    Yamaguchi, Y.2    Watanabe, K.3    Ogura, T.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.