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Volumn , Issue , 1991, Pages 282-286
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ATPG based on a novel grid-addressable latch element
a a a a
a
NONE
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Author keywords
[No Author keywords available]
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Indexed keywords
INTEGRATED CIRCUITS, DIGITAL--TESTING;
BUILT-IN SELF TEST;
DESIGN FOR TESTABILITY;
LOGIC CIRCUITS, SEQUENTIAL;
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EID: 0026175482
PISSN: 01467123
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/127601.127681 Document Type: Conference Paper |
Times cited : (15)
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References (13)
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