The Efficient Solution of Integer Programs for Hierarchical Global Routing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 10, Issue 6, 1991, Pages 748-753

  Heisterman, Jorg ^a   Lengauer, Thomas ^a  

^a UNIVERSITY OF PADERBORN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; MATHEMATICAL PROGRAMMING;

GREEDY ROUTING ALGORITHM; HIERARCHICAL GLOBAL ROUTING; INTEGER PROGRAMMING; ROUTING GRAPHS;

INTEGRATED CIRCUITS;

EID: 0026169344     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.137503     Document Type: Article

References (10)

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3. W.W.-M. Dai, M. Sato, and E. S. Kuh, “Partial 3-trees and applications to circuit layout, “in Proc. Int. Symp. on Circuits and Systems, 1987, pp. 31–34.
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5. T. Lengauer, Combinatorial Algorithms for Integrated Circuit Layout. New York: Wiley, 1990.
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7. N. Müller, “Ein Algorithmus zur Bestimmung einer globalen Verdrahtung,” Master’s thesis, Dep. Computer Sci., Univ. Saarland, Saarbrücken, West Germany, 1987.
8. A.P.-C. Ng, P. Raghavan, and C. D. Thompson, “Experimental results for a linear program global router,” Comput. Artif. Intellig., vol. 6, no. 3, pp. 229–242, 1987.
9. P. Raghavan and C. D. Thompson, “Randomized rounding: A technique for provably good algorithms and algorithmic proofs,” Combinatorica, vol. 7, no. 4, pp. 365–374, 1987.
10. G. Zimmermann, “A new area and shape function estimation technique for VLSI layouts,” in Proc. 25th Design Automation Conf., 1988, pp. 60–65.