Circuit precautions for stable operation of josephson junction array voltage standard

IEEE Transactions on Instrumentation and Measurement

Volumn 40, Issue 2, 1991, Pages 305-308

  Sakamoto, Yasuhiko ^b   Endo, Tadashi ^b  

^a ADVANTEST CORPORATION   (Japan)

^b ELECTROTECHNICAL LABORATORY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

PHASE LOCKED LOOPS; STANDARDS; SUPERCONDUCTING DEVICES--JOSEPHSON JUNCTIONS;

JOSEPHSON JUNCTION ARRAYS;

ELECTRIC MEASUREMENTS;

EID: 0026142463     PISSN: 00189456     EISSN: 15579662     Source Type: Journal    
DOI: 10.1109/TIM.1990.1032945     Document Type: Article

References (4)

1. Y. Sakamoto, H. Yoshida, T. Sakuraba, A. Odawara, V. Murayama, yama, and T. Endo, “Josephson junction array voltage standard at the ETL,” IEEE Trans. Instrum. Meas., vol. 40, pp. 312–316, this issue.
2. See, for example, J. Niemeyer and L. Grimm, “The present status of the PTB voltage standard with Josephson series arrays,” CCE/ 86–53, 1986.
3. R. L. Steiner and B. F. Field, “Josephson array voltage calibration system: Operational use and verification,” IEEE Trans. Instrum. Meas., vol. 38, pp. 296–301, Apr. 1989.
4. J. Clarke, A. N. Clealand, M. H. Devort, D. Esteve, and J. M. Martinis, “Quantum mechanics of a macroscopic variable: The phase difference of a Josephson junction,” Science, vol. 239, pp. 992–997, Feb. 1988.