Efficient Residue-to-Binary Conversion Technique with Rounding Error Compensation

IEEE Transactions on Circuits and Systems

Volumn 38, Issue 3, 1991, Pages 315-317

  Kim, Jin Yul ^a   Park, Kyu Ho ^a   Lee, Hwang Soo ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

MATHEMATICAL TECHNIQUES - NUMBER THEORY; NUMBERING SYSTEMS;

CHINESE REMAINDER THEOREM; RESIDUE-TO-BINARY CONVERSION; ROUNDING ERROR COMPENSATION; SCALE-DECODING TECHNIQUE;

SIGNAL PROCESSING;

EID: 0026128893     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/31.101324     Document Type: Article

References (9)

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3. R. Krishnan, G. A. Jullien, and W. C. Miller, “Complex digital signal processing using quadratic residue number systems,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-34, pp. 166–177, Feb. 1986.
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5. W. K. Jenkins, “Techniques for residue-to-analog conversion for residue-encoded digital filters,” IEEE Trans. Circuits Syst., vol. CAS-25, pp. 555–562, July 1978.
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8. M. A. Soderstrand, C. Vernia, and J.-H. Chang, “An improved residue number system digital-to-analog converter,” IEEE Trans. Circuits Syst., vol. CAS-30, pp. 903–907, Dec. 1983.
9. M. A. Bayoumi, G. Jullien, and W. C. Miller, “A VLSI implementation of residue adders,” IEEE Trans. Circuits Syst., vol. CAS-34, pp. 284–288, Mar. 1987.