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Volumn 38, Issue 2, 1991, Pages 386-391

ONO Inter-Poly Dielectric Scaling for Nonvolatile Memory Applications

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS--APPLICATIONS; OXIDES--APPLICATIONS; SEMICONDUCTING SILICON COMPOUNDS--APPLICATIONS;

EID: 0026107524     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.69921     Document Type: Article
Times cited : (56)

References (14)
  • 1
    • 0020476484 scopus 로고
    • Double polysilicon plate capacitors with oxide/nitride insulator
    • G. Gildenblat, M. Ghezzo, and J. Norton, “Double polysilicon plate capacitors with oxide/nitride insulator,” Electron. Lett., vol. 18, no. 1, p. 34, 1982.
    • (1982) Electron. Lett. , vol.18 , Issue.1 , pp. 34
    • Gildenblat, G.1    Ghezzo, M.2    Norton, J.3
  • 8
    • 0025600802 scopus 로고
    • A model for EPROM intrinsic charge loss through oxide/nitride/ oxide (ONO) interpoly dielectric
    • K. Wu, C. S. Pan, J. J. Shaw, P. Freiberger, and G. Sery, “A model for EPROM intrinsic charge loss through oxide/nitride/ oxide (ONO) interpoly dielectric,” in Proc. 1990IEEE 1RPS, p. 145, 1990.
    • (1990) Proc. 1990IEEE 1RPS , pp. 145
    • Wu, K.1    Pan, C.S.2    Shaw, J.J.3    Freiberger4    Sery, G.5
  • 9
    • 0022207689 scopus 로고
    • Low leakage current polysilicon oxide grown by two-step oxidation
    • Y. Mikata, S. Mori, K. Shinada, and T. Usami, “Low leakage current polysilicon oxide grown by two-step oxidation,” in Proc. 1985 IEEE IRPS, p. 32, 1985.
    • (1985) Proc. IEEE IRPS , pp. 32
    • Mikata, Y.1    Mori, S.2    Shinada, K.3    Usami, T.4
  • 10
    • 0020708742 scopus 로고
    • A Low-voltage alterable EEPROM and metal-oxide-nitride-oxide-semiconductor (MONOS) structures
    • E. Suzuki, H. Hirahashi, K. Ishii, and Y. Hayashi, “A Low-voltage alterable EEPROM and metal-oxide-nitride-oxide-semiconductor (MONOS) structures,” IEEE Trans. Electron Devices, vol. ED-30, p. 122, 1983.
    • (1983) IEEE Trans. Electron Devices , vol.ED-30 , pp. 122
    • Suzuki, E.1    Hirahashi, H.2    Ishii, K.3    Hayashi, Y.4
  • 11
    • 84941523777 scopus 로고
    • Evidence of hole flow in silicon nitride for positive gate voltage
    • F. T. Liou and S. O. Chen, “Evidence of hole flow in silicon nitride for positive gate voltage,” IEEE Trans. Electron Devices, vol. ED-31, p. 1736, 1984.
    • (1984) IEEE Trans. Electron Devices , vol.ED-31 , pp. 1736
    • Liou, F.T.1    Chen, S.O.2
  • 12
    • 0023994625 scopus 로고
    • Conduction and charge trapping in polysilicon-silicon nitride-oxide-silicon structures under positive gate bias
    • M. Aminzadeh, S. Nozaki, and R. V. Gridihar,” Conduction and charge trapping in polysilicon-silicon nitride-oxide-silicon structures under positive gate bias,” IEEE Trans. Electron Devices, vol. 35 no. 4, pp. 459–467, 1988.
    • (1988) IEEE Trans. Electron Devices , vol.35 , Issue.4 , pp. 459-467
    • Aminzadeh, M.1    Nozaki, S.2    Gridihar, R.V.3
  • 13
    • 0023172609 scopus 로고
    • Reliability of nano-meter thick multi-layer dielectric films on poly-crystalline silicon
    • Y. Ohji, T. Kusaka, I. Yoshida, A. Hiraiwa, K. Yagi, and K. Mukai, “Reliability of nano-meter thick multi-layer dielectric films on poly-crystalline silicon,” in Proc. 1987 IEEE IRPS, p. 55, 1987.
    • (1987) Proc. IEEE IRPS , pp. 55
    • Ohji, Y.1    Kusaka, T.2    Yoshida, I.3    Hiraiwa, A.4    Yagi, K.5    Mukai, K.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.