Shallow Defects Responsible for GR Noise in MOSFET’s

IEEE Transactions on Electron Devices

Volumn 38, Issue 2, 1991, Pages 407-416

  Murray, David C ^a   Evans, Alan G R ^a   Carter, Julian C ^a  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

HEAT TREATMENT--ANNEALING;

BULK SILICON DEFECT INFORMATION; DEFECT DENSITY ESTIMATION; DEPLETION LAYERS; GENERATION-RECOMBINATION (GR) NOISE; GR TRAPPING PARAMETERS; RAPID THERMAL ANNEALED (RTA) MOSFET'S;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0026106165     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.69924     Document Type: Article

References (21)

1. Z. Celik-Butler and T. Y. Hsiang, “Spectral dependence of l/f noise on gate bias in n-MOSFETs,” Solid State Electron., pp. 419–423, 1987.
2. R. Jayaraman and C. G. Sodini, “A l/ f noise technique to extract the oxide trap density near the conduction band edge of silicon,” IEEE Trans. Electron Devices, vol. 36, pp. 1773–1782. 1989.
3. A. L. McWhorter, “1/ f noise and germanium surface properties,” in Semiconductor Surface Physics. Philadelphia, PA: Univ. Pennsylvania Press, 1956, pp. 207–228.
4. M. J. Uren, D. J. Day, and M. J. Kirton, “1/ f and random telegraph noise in silicon metal oxide field effect transistors,” Appl. Phys. Lett., vol. 47, pp. 1195–1197, 1985.
5. L. D. Yau and C. T. Sah, “Theory and experiments of low frequency generation-recombination noise in MOS transistors,” IEEE Trans. Electron Devices, vol. ED-16, pp. 170–177, 1969.
6. M. J. Hart and A. G. R. Evans, “Rapid thermal processing in semiconductor technology,” Semicond. Sci. Technol., vol. 3, pp. 421–436, 1988.
7. D. C. Murray, A. G. R. Evans, J. L. Altrip, and J. C. Carter, “Noise and electrical characterisation of e-beam rapid isothermally annealed n-channel MOSFETs,” Semicond. Sci. Technol., vol. 4, pp. 393–398, 1989.
8. D. C. Murray, N. Siabi-Shahrivar, A. G. R. Evans, W. Redman-White, J. C. Carter, and J. L. Altrip, “Increase of low frequency noise generating defects in today’s CMOS/BiCMOS technologies,” Mat. Sci. Eng., vol. B4, pp. 367–372, 1989.
9. N. M. Johnson, “Electronic defects in CW transient thermal processed silicon,” Semicond. Semimetals, vol. 17, pp. 177–266, 1984.
10. N. H. Sheng and J. L. Merz, “Quenched in defects in CW laser annealed Si,” in Laser and Electron Beam Interactions with Solids (MRS Proc.), vol. 4, pp. 313–318, 1982.
11. K. Graff, “Transition metals in silicon and their gettering behaviour,” Mat. Sci. Eng., vol. B4, pp. 63–69, 1989.
12. A. R. Peaker, B. Hamilton, G. R. Lahiji, I. E. Ture, and G. Lorimer, “Electrical behaviour of decorated stacking faults in silicon,” Mat. Sci. Eng., vol. B4, pp. 123–128, 1989.
13. S. Machlup, “Noise in semiconductors: Spectrum of a two part parameter random signal,” J. Appl. Phys., vol. 25, pp. 341–343, 1954.
14. F. Scholtz, J. M. Hwang, and D. K. Schroder, “Low frequency noise and DLTS as semiconductor device characterisation tools,” Solid-State Electron., vol. 31, 205–217, 1988.
15. K. Kandiah, “Energy levels of bulk defects responsible for L.F. noise in Si JFETs,” in Noise in Physical Systems and 1 /f Noise Proc. Amsterdam, The Netherlands: Elsevier, 1983, pp. 287–290.
16. C. Cox, “An automatically calibrated universal measuring equipment for noise in semiconductors,” AERE Tech. Rep. R10642, HMSO, 1982.
17. C. Cox and M. Reid, “A temperature controller in the 6000 series,” AERE Tech. Rep. R10298, HMSO, 1981.
18. J. Y. C. Sun, R. Angelucci, C. Y. Wong, G. Scilla, and E. Landi, “Rapid thermal processing of arsenic implanted polysilicon on very thin oxide,” in Proc. ESSDERC 88 Conf. J. Phys., pp. C4, 401–404, 1988.
19. S. M. Sze, VLSI Technology. New York: NY: McGraw-Hill, 1983, p. 487.
20. S. M. Sze, Physics of Semiconductor Devices, 2nd ed. New York, NY: Wiley, 1981, chs. 7 and 8.
21. G. F. Cerofolini and G. Ottaviani, “Hydrogen in silicon: State reactivity and evolution after ion implantation,” Mat. Sci. Eng., vol. B4, pp. 19–24, 1989.