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Volumn 24, Issue 1, 1991, Pages 72-79

Hector: A Hierarchically Structured Shared-Memory Multiprocessor

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER INTERFACES; COMPUTERS - DATA COMMUNICATION SYSTEMS; DATA TRANSMISSION - PACKET SWITCHING;

EID: 0025722424     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/2.67196     Document Type: Article
Times cited : (60)

References (10)
  • 1
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    • Programming for Parallelism
    • May
    • A. H. Karp, “Programming for Parallelism,” Computer, Vol. 20, No. 5, May 1987, pp, 43–57.
    • (1987) Computer , vol.20 , Issue.5 , pp. 43-57
    • Karp, A.H.1
  • 2
    • 84909766073 scopus 로고
    • Special Report: 1989 Gordon Bell Prize
    • May, 110.
    • J. Dongarra et al., “Special Report: 1989 Gordon Bell Prize,” IEEE Software, Vol. 7, No. 3, May 1990, pp. 100-104, 110.
    • (1990) IEEE Software , vol.7 , Issue.3 , pp. 100-104
    • Dongarra, J.1
  • 3
    • 0025431380 scopus 로고
    • APRIL: A Processor Architecture for Multiprocessing
    • IEEE Computer Soc. Press, Los Alamitos, Calif., Order No. 2047
    • A. Agrawal et al., “APRIL: A Processor Architecture for Multiprocessing,” 17th Int'l Symp. Computer Architectures, 1990, IEEE Computer Soc. Press, Los Alamitos, Calif., Order No. 2047, pp. 104-114.
    • (1990) 17th Int'l Symp. Computer Architectures , pp. 104-114
    • Agrawal, A.1
  • 4
    • 0023702551 scopus 로고
    • The Wisconsin Multicube: A New Large-Scale Cache-Coherent Multiprocessor
    • IEEE Computer Soc. Press, Los Alamitos, Calif., Order No. 861
    • J. R. Goodman and P. J. Woest, “The Wisconsin Multicube: A New Large-Scale Cache-Coherent Multiprocessor,” 15th Int'l Symp. Computer Architectures, 1988, IEEE Computer Soc. Press, Los Alamitos, Calif., Order No. 861, pp. 422-431.
    • (1988) 15th Int'l Symp. Computer Architectures , pp. 422-431
    • Goodman, J.R.1    Woest, P.J.2
  • 5
    • 0025429467 scopus 로고
    • The Directory-Based Cache Coherence Protocol for the Dash Multiprocessor
    • IEEE Computer Soc. Press, Los Alamitos, Calif., Order No. 2047
    • D. Lenoski et al., “The Directory-Based Cache Coherence Protocol for the Dash Multiprocessor,” 17th Int'l Symp. Computer Architectures, 1990, IEEE Computer Soc. Press, Los Alamitos, Calif., Order No. 2047, pp. 148-159.
    • (1990) 17th Int'l Symp. Computer Architectures , pp. 148-159
    • Lenoski, D.1
  • 6
    • 0022200333 scopus 로고
    • The IBM Research Parallel Processor Prototype
    • IEEE Computer Soc. Press, Los Alamitos, Calif.
    • G. F. Pfister et al., “The IBM Research Parallel Processor Prototype,” Proc. Int'l Conf. Parallel Processing, 1985, IEEE Computer Soc. Press, Los Alamitos, Calif., pp. 764-771.
    • (1985) Proc. Int'l Conf. Parallel Processing , pp. 764-771
    • Pfister, G.F.1
  • 7
    • 0012619597 scopus 로고
    • The Monarch Parallel Processor Hardware Design
    • Apr.
    • R. D. Rettberg et al., “The Monarch Parallel Processor Hardware Design,” Computer, Vol. 23, No. 4, Apr. 1990, pp. 18-30.
    • (1990) Computer , vol.23 , Issue.4 , pp. 18-30
    • Rettberg, R.D.1
  • 9
    • 0022661204 scopus 로고
    • Parallel Supercomputing Today and the Cedar Approach
    • Feb.
    • D. J. Kuck et al., “Parallel Supercomputing Today and the Cedar Approach,” Science, Vol. 23, Feb. 1986, pp. 967-974.
    • (1986) Science , vol.23 , pp. 967-974
    • Kuck, D.J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.