0.6 μm, single poly advanced BiCMOS (ABiC IV) technology for ASIC applications

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1990, Pages 87-88

  Iranmanesh, Ali ^a   Ilderem, Vida ^a   Solheim, Alan ^a   Blair, Chris ^a   Lam, Lawrence ^a   Haas, Fred ^a   Leibiger, Steve ^a   Bouknight, Lyle ^a   Lahri, Rajeeva ^a   Biswal, Madan ^a   Bastani, Bami ^a  

^a NATIONAL SEMICONDUCTOR CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASIC APPLICATION; BI-CMOS; BIPOLAR PROCESS; EMBEDDED MEMORIES; FOURTH GENERATION; GATE DELAYS; HIGH-PERFORMANCE CMOS; INTERCONNECTION DELAY; SINGLE-POLY; STATE OF THE ART;

CHEMICAL VAPOR DEPOSITION; SILICIDES; TECHNOLOGY; TUNGSTEN; LOGIC CIRCUITS, EMITTER COUPLED; LOGIC DEVICES;

BICMOS TECHNOLOGY; INTEGRATED CIRCUITS, CMOS;

ASIC; BICMOS; DIGEST OF PAPER; LOGIC ARRAYS; POLYEMITTERS;

EID: 0025692339     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.1990.111021     Document Type: Conference Paper

References (2)

1. A. Iranmanesh et al, BCTM Technical Digest, pp 30-32, BCTM, 1989.
2. M. Vora et al, IEDM Technical Digest, pp 690-694, IEDM, 1984.