An FPGA family optimized for high densities and reduced routing delay

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1990, Pages

  Ahrens, Mike ^a   El Gamal, Abbas ^a   Galbraith, Doug ^a   Greene, Jonathan ^a   Kaptanoglu, Sinan ^a   Dharmarajan, K R ^a   Hutchings, Lynn ^a   Ku, Sifuei ^a   McGibney, Phil ^a   McGowan, John ^a   Sanie, Amer ^a   Shaw, Kitty ^a   Stiawalt, Norma ^a   Whitney, Telle ^a   Wong, Tom ^a   Wong, Wayne ^a   Wu, Bortay ^a  

^a Actel Corp   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC DEVICES--DESIGN;

CLOCK SPEED; CMOS DESIGN; FIELD PROGRAMMABLE GATE ARRAY; LOGIC DENSITY; PROGRAMMABLE LOGIC DEVICES;

INTEGRATED CIRCUITS, CMOS;

EID: 0025684074     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)