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Volumn 9, Issue 12, 1990, Pages 1272-1277

Layer Assignment for Multichip Modules

Author keywords

approximation algorithms; Electronic packaging; layer assignment; multichip modules (MCM); multiterminal nets; NP complete ness; VLSI layout

Indexed keywords

INTEGRATED CIRCUITS--ELECTRONICS PACKAGING; MATHEMATICAL TECHNIQUES--ALGORITHMS;

EID: 0025664148     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.62772     Document Type: Article
Times cited : (30)

References (11)
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  • 2
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  • 3
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    • Kang, S.1
  • 4
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    • Optimization by simulated annealing
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    • (1983) Sci. , vol.220 , pp. 671-680
    • Kirkpatrick, S.1    Gelatt, C.D.2    Vecchi, M.P.3
  • 5
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    • An algorithm for path connection and its application
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    • R. Linsker, “An iterative improvement penalty function drive wire routing system,” IBM J. Res. Develop., vol. 28, no. 5, pp. 613–624, Sept. 1984.
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  • 7
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    • Shortest path through a maze
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    • (1959) Annals of Computation Laboratory , pp. 285-292
    • Moore, E.F.1
  • 9
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    • The complexity of satisfiability problems
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  • 10
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    • Electronic packaging evolution in IBM
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    • D. P. Seraphin and I. Feinberg, “Electronic packaging evolution in IBM,” IBM J. Res. Develop., vol. 25. Sept. 1981.
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    • Seraphin, D.P.1    Feinberg, I.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.