Improved cellular structures for bit-steered ROM finite ring systolic arrays

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1990, Pages 1414-1417

  Jullien, G A ^a   Miller, W C ^a  

^a UNIVERSITY OF WINDSOR   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS, DIGITAL--PIPELINE PROCESSING; DATA STORAGE, DIGITAL--CELLULAR ARRAYS; INTEGRATED CIRCUITS, VLSI--DESIGN;

BIT LEVEL SYSTOLIC ARRAYS; CELLULAR STRUCTURE; DIGITAL SIGNAL PROCESSING; PIPELINE LATCHES; ROM PROCESSOR CIRCUITS;

SIGNAL PROCESSING;

EID: 0025635450     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)