High-speed architectures for algorithms with quantizer loops

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1990, Pages 2357-2360

  Parhi, Keshab K ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING--ALGORITHMS; ELECTRIC FILTERS; EQUALIZERS; PULSE CODE MODULATION;

DIFFERENTIAL FEEDBACK EQUALIZERS;

SIGNAL PROCESSING;

EID: 0025623849     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)