A Circuit-Level Simulation Model of PNPN Devices

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 9, Issue 12, 1990, Pages 1254-1264

  Brambilla, Angelo ^a   Dallago, Enrico ^a  

^a UNIVERSITY OF PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

INDUSTRIAL ELECTRONICS; SEMICONDUCTOR DEVICES--COMPUTER SIMULATION;

CIRCUIT SIMULATION; GATE TURN OFF THYRISTOR; POWER ELECTRONICS; REGENERATING PHENOMENON; THREE JUNCTION DEVICE;

THYRISTORS;

EID: 0025590419     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.62770     Document Type: Article

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