A high performance 0.5 μm BiCMOS triple polysilicon technology for 4 Mb fast SRAMs

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1990, Pages 481-484

  Mele, T C ^a   Hayden, J ^a   Walczyk, F ^a   Lien, M ^a   See, Y C ^a   Denning, D ^a   Cosentino, S ^a   Perera, A H ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE, SEMICONDUCTOR; INTEGRATED CIRCUITS, CMOS; LOGIC CIRCUITS, EMITTER COUPLED; LOGIC DEVICES--GATES;

BICMOS; ECL GATE DELAY; POLYSILICON; SRAM;

DATA STORAGE, DIGITAL;

EID: 0025575597     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)