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Volumn , Issue , 1990, Pages 322-325
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On determining scan flip-flops in partial-scan designs
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRONIC CIRCUITS, FLIP FLOP;
MATHEMATICAL TECHNIQUES;
BENCHMARK CIRCUITS;
PARTIAL SCANS;
S-GRAPHS;
SCAN FLIP-FLOPS;
LOGIC CIRCUITS, SEQUENTIAL;
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EID: 0025561326
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (97)
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References (14)
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