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Volumn 13, Issue 4, 1990, Pages 780-786

Self-Aligned Flip-Chip Assembly of Photonic Devices with Electrical and Optical Connections

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED OPTICS; OPTOELECTRONIC DEVICES;

EID: 0025550651     PISSN: 01486411     EISSN: None     Source Type: Journal    
DOI: 10.1109/33.62593     Document Type: Article
Times cited : (126)

References (16)
  • 1
    • 84939365406 scopus 로고
    • Size, transparency and control in optical switch fabrics: A 16 × 16 single chip array in lithium niobate and its applications
    • presented at Int. Topical Meeting on Photonic Switching, Kobe, Japan, Apr. 12–14, paper 13A-3.
    • P. J. Duthie, M. J. Wale, and I. Bennion, “Size, transparency and control in optical switch fabrics: A 16 × 16 single chip array in lithium niobate and its applications,” presented at Int. Topical Meeting on Photonic Switching, Kobe, Japan, Apr. 12–14, 1990, paper 13A-3.
    • (1990)
    • Duthie, P.J.1    Wale, M.J.2    Bennion, I.3
  • 2
    • 0343074158 scopus 로고
    • A new self-aligned technique for the assembly of integrated optical devices with optical fibre and electrical interfaces
    • Gothenburg, Sweden, Sept. 10–14
    • M. J. Wale, C. Edge, F. A. Randle, and D. J. Pedder, “A new self-aligned technique for the assembly of integrated optical devices with optical fibre and electrical interfaces,” in Proc. 15th European Conf. Optical Communications, Gothenburg, Sweden, Sept. 10–14, 1989, pp. 368–371.
    • (1989) Proc. 15th European Conf. Optical Communications , pp. 368-371
    • Wale, M.J.1    Edge, C.2    Randle, F.A.3    Pedder, D.J.4
  • 3
    • 0000336248 scopus 로고
    • Controlled collapse reflow chip joining
    • May
    • L. F. Miller, “Controlled collapse reflow chip joining,” IBM J. Res. Develop., pp. 239–250, May 1969.
    • (1969) IBM J. Res. Develop. , pp. 239-250
    • Miller, L.F.1
  • 4
    • 0020763536 scopus 로고
    • Area array solder interconnections for VLSI
    • June
    • L. S. Goldman and P. A. Totta, “Area array solder interconnections for VLSI,” Solid-State Technol., pp. 91–97. June 1983.
    • (1983) Solid-State Technol. , pp. 91-97
    • Goldman, L.S.1    Totta, P.A.2
  • 5
    • 84955781200 scopus 로고
    • Flip chip solder bonding for microelectronic applications
    • Brighton, U.K., Nov. 1987; also Hybrid Circuits
    • D. J. Pedder “Flip chip solder bonding for microelectronic applications.” in Proc. BABS Int. Conf. on High Technology Joining, Brighton, U.K., Nov. 1987; also Hybrid Circuits, vol. 15, pp. 4–7, 1988.
    • (1988) Proc. BABS Int. Conf. on High Technology Joining , vol.15 , pp. 4-7
    • Pedder, D.J.1
  • 7
  • 9
    • 2342497468 scopus 로고
    • Accurate optical coupling using solder bump bonding
    • Institute of Electronics, Information and Communications Engineers of Japan, ref. S9-6, (in Japanese).
    • T. Hayashi and T. Ohsaki, “Accurate optical coupling using solder bump bonding,” Institute of Electronics, Information and Communications Engineers of Japan, ref. S9-6, p. 2–338, 1986 (in Japanese).
    • (1986) , pp. 2-338
    • Hayashi, T.1    Ohsaki, T.2
  • 10
    • 0020128166 scopus 로고
    • Optimization of indium-lead alloys for controlled collapse chip connection application
    • R. T. Howard, “Optimization of indium-lead alloys for controlled collapse chip connection application,” IBM J. Res. Develop., vol. 26. no. 3, pp. 372–378, 1982.
    • (1982) IBM J. Res. Develop. , vol.26 , Issue.3 , pp. 372-378
    • Howard, R.T.1
  • 11
    • 0024168143 scopus 로고
    • Thermal stability of various ball-limited-metal systems under solder bumps
    • K. Mizuishi and T. Mori “Thermal stability of various ball-limited-metal systems under solder bumps,” IEEE Trans. Comp. Hybrids, Manuf. Technol., vol. 11, pp. 481–484, 1988.
    • (1988) IEEE Trans. Comp. Hybrids, Manuf. Technol. , vol.11 , pp. 481-484
    • Mizuishi, K.1    Mori, T.2
  • 12
    • 0014824131 scopus 로고
    • Design considerations for a flip chip joining technique
    • July
    • P. Lin, J. Lee, and S. Im, “Design considerations for a flip chip joining technique,” Solid-State Technol., pp. 48–54, July 1970.
    • (1970) Solid-State Technol. , pp. 48-54
    • Lin, P.1    Lee, J.2    Im, S.3
  • 13
    • 0001481981 scopus 로고
    • Reliability of controlled collapse interconnections
    • May
    • K. C. Norris and A. H. Landzberg, “Reliability of controlled collapse interconnections,” IBM J. Res. Develop., pp. 266–271, May 1969.
    • (1969) IBM J. Res. Develop. , pp. 266-271
    • Norris, K.C.1    Landzberg, A.H.2
  • 14
    • 0023214097 scopus 로고
    • Image analysis methods for solder ball inspection in integrated circuit manufacturing
    • Raleigh, NC, Mar. 30–Apr. 3
    • W. E. Blanz, J. L. C. Sanz, and E. B. Hinkle, “Image analysis methods for solder ball inspection in integrated circuit manufacturing,” in Proc. IEEE Int. Conf. Robotics and Automation, Raleigh, NC, Mar. 30–Apr. 3, 1987, pp. 509–514.
    • (1987) Proc. IEEE Int. Conf. Robotics and Automation , pp. 509-514
    • Blanz, W.E.1    Sanz, J.L.C.2    Hinkle, E.B.3
  • 15
    • 0023979572 scopus 로고
    • Automated visual inspection of solder bumps
    • R. Ray, “Automated visual inspection of solder bumps,” AT&T Tech. J., vol. 67, no. 2, pp. 47–60, 1988.
    • (1988) AT&T Tech. J. , vol.67 , Issue.2 , pp. 47-60
    • Ray, R.1
  • 16
    • 0020127035 scopus 로고
    • Silicon as a mechanical material
    • K. E. Petersen, “Silicon as a mechanical material,” Proc. IEEE, vol. 70, pp. 420–457, 1982.
    • (1982) Proc. IEEE , vol.70 , pp. 420-457
    • Petersen, K.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.