A 10-b 75-MSPS Subranging A/D Converter with Integrated Sample and Hold

IEEE Journal of Solid-State Circuits

Volumn 25, Issue 6, 1990, Pages 1339-1346

  Petschacher, Reinhard ^a   Zojer, Bernhard ^a   Astegher, Berthold ^a   Jessner, Hermann ^a   Lechner, Alexander ^a  

^a SIEMENS AG ÖSTERREICH   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, MONOLITHIC--DESIGN; SEMICONDUCTOR DEVICES, BIPOLAR--DESIGN; SIGNAL PROCESSING--VIDEO SIGNALS;

ANALOG DIGITAL CONVERTER; DIFFERENTIAL CONVERTERS; DIFFERENTIAL RESISTOR LADDERS; DIGITAL VIDEO; INTEGRATED SAMPLE AND HOLD; UNITY GAIN FEEDBACK AMPLIFIER;

DATA CONVERSION, ANALOG TO DIGITAL;

EID: 0025542704     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.62177     Document Type: Article

References (11)

1. T. Takemoto, M. Inoue, H. Sadamatsu, A. Matsuzawa, and K. Tsuji, “A fully parallel 10-bit A/D converter with video speed,” IEEE J. Solid-State Circuits, vol. SC-17, no. 6, pp. 1133–1138, 1982.
2. C. Lane, “A 10-bit 60 MSPS flash ADC,” in IEEE Bipolar Circuits and Technology Meeting, Dig. Tech. Papers, Sept. 1989, pp. 44–47.
3. T. Shimizu, M. Hotta, K. Maijo, and S. Ueda, “A 10-bit 20-MHz two-step parallel A/D converter with internal S/H,” IEEE J. Solid-State Circuits, vol. 24, no. 1, 13–20, Feb. 1989.
4. Y. Sugimoto, and S. Mizoguchi, “An experimental BiCMOS video 10-bit ADC,” IEEE J. Solid-State Circuits, vol. 24, no. 4, pp. 997–999, Aug. 1989.
5. B.-S. Song, and M. F. Tompsett, “A 10 b 15 MHz recycling two-step A/D converter,” in ISSCC Dig. Tech. Papers, Feb. 1990, pp. 158–159.
6. D. Robertson, P. Real, and C. Mangelsdorf, “A wideband 10-bit 20 Msps pipelined ADC using current-mode signals,” in ISSCC Dig. Tech. Papers, Feb. 1990, pp. 160–161.
7. A. Matsuzawa et al., “A 10 b 30 MHz two-step parallel BiCMOS ADC with internal S/H,” in ISSCC Dig. Tech. Papers, Feb. 1990, pp. 162–163.
8. B. Astheger, A. Lechner, and H. Jessner, “A novel all-NPN sample and hold circuit,” in 15th European Solid-State Circuits Conf. Dig. Tech. Papers (Vienna), 1989, pp. 88–91.
9. C. R. Ryan, “Applications of a four-quadrant multiplier,” IEEE J. Solid-State Circuits, vol. SC-5, no. 1, pp. 45–48, 1970.
10. B. Zojer and R. Petschacher, “An 8-bit/120 MHz full-Nyquist analog to digital converter,” Siemens Res. Develop. Rep., vol. 15, no. 2, 68–72, 1986.
11. H. Ullrich, W. Brackelmann, H. Fritzsche, and A. Wieder, “A 100 ps 9K gate ECL masterslice,” in ISSCC Dig. Tech. Papers, Feb. 1985, pp. 200–201.