Architecture of Field-Programmable Gate Arrays: The Effect of Logic Block Functionality on Area Efficiency

IEEE Journal of Solid-State Circuits

Volumn 25, Issue 5, 1990, Pages 1217-1225

  Rose, Jonathan ^a   Francis, Robert J ^a   Lewis, David ^a   Chow, Paul ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC CIRCUITS, FLIP FLOP; LOGIC CIRCUITS - COMPUTER AIDED DESIGN;

FIELD-PROGRAMMABLE GATE ARRAY (FPGA);

LOGIC DEVICES;

EID: 0025505369     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.62145     Document Type: Article

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