Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor

IEEE Transactions on Computers

Volumn 39, Issue 9, 1990, Pages 1132-1145

  Banerjee, Prithviraj ^a   Rahmeh, Joe T ^b   Stunkel, Craig ^c   Nair, V S ^a   Roy, Kaushik ^a   Balasubramanian, Vijay ^a   Abraham, Jacob A ^b  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Error coverage; hypercube multiprocessors; parallel algorithms; reconfiguration; system level error detection

Indexed keywords

COMPUTER ARCHITECTURE;

COMPUTER FAULT TOLERANCE; DISCRETE FOURIER TRANSFORMS; HYPERCUBE MULTIPROCESSORS; MATRICES; MATRIX MULTIPLICATION; MULTIPROCESSING;

COMPUTER SYSTEMS, DIGITAL;

EID: 0025489006     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.57055     Document Type: Article

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