Combined hardware selection and pipelining in high performance data-path design

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1990, Pages 328-331

  Note, Stefaan ^a   Catthoor, Francky ^a   Goossens, Gert ^a   De Man, Hugo ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS, DIGITAL - PIPELINE PROCESSING; MATHEMATICAL TECHNIQUES - ALGORITHMS;

ABSTRACT BUILDING BLOCK; DATA PATH DESIGN; DIGITAL SIGNAL PROCESSING; HARDWARE BUILDING BLOCK; HIGH LEVEL SYNTHESIS;

INTEGRATED CIRCUITS, DIGITAL;

EID: 0025487048     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)