Built-in self-test with weighted random pattern hardware

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1990, Pages 161-166

  Brglez, Franc ^a   Gloster, Gary ^a   Kedem, Gershon ^a  

^a MCNC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC CIRCUITS, DIGITAL - TESTING; INTEGRATED CIRCUIT TESTING - COMPUTER AIDED ANALYSIS;

BUILT IN SELF TEST; COMPUTER AIDED TESTING; DIGITAL CIRCUITS;

INTEGRATED CIRCUITS, DIGITAL;

EID: 0025487032     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)