Hierarchical test assembly for macro based VLSI design

Digest of Papers - International Test Conference

Volumn , Issue , 1990, Pages 520-529

  Leenstra, Jens ^a   Spaanenburg, Lambert ^a  

^a Institut fur Mikroelektronik Stuttgart   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING; DATA CONVERSION, ANALOG TO DIGITAL; MICROPROCESSOR CHIPS;

CHIP TEST PROGRAMS; DESIGN FOR TESTABILITY; HIERARCHICAL TEST ASSEMBLY; MACRO BASED VLSI DESIGN; MACRO TESTS; MODULAR DESIGN;

INTEGRATED CIRCUITS, VLSI;

EID: 0025478890     PISSN: 07431686     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)