Analysis of Propagation Delays in High-Speed VLSI Circuits Using a Distributed Line Model

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 9, Issue 8, 1990, Pages 821-826

  Passlack, Matthias ^a   Uhle, Manfred ^b   Elschner, Horst ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

^b Berlin Brandenburgische Akademie der Wissenschaften   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC CIRCUITS--COMPUTER SIMULATION; INTEGRATED CIRCUITS, DIGITAL--COMPUTER SIMULATION;

DISTRIBUTED-LINE MODEL;

INTEGRATED CIRCUITS, VLSI;

EID: 0025469356     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.57789     Document Type: Article

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