An 18 ns 56-bit multiply-adder circuit

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1990, Pages

  Montoye, R K ^a   Cook, P W ^a   Hokenek, E ^a   Havreluk, R P ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, CMOS; INTEGRATED CIRCUITS, VLSI;

CMOS TECHNOLOGY; FLOATING POINT OPERATIONS; MULTIPLY ADDER CIRCUITS; VLSI DESIGN;

MICROPROCESSOR CHIPS;

EID: 0025451410     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/isscc.1990.110122     Document Type: Conference Paper

References (3)