Hierarchical Test Generation Using Precomputed Tests for Modules

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 9, Issue 6, 1990, Pages 594-603

  Murray, Brian T ^a   Hayes, John P ^b  

^a GM Research Lab   (United States)

^b UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE--APPLICATIONS; COMPUTER AIDED DESIGN;

TEST GENERATION;

INTEGRATED CIRCUITS, DIGITAL;

EID: 0025438849     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.55189     Document Type: Article

References (19)

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