A 16-b 160-kHz CMOS A/D Converter Using Sigma-Delta Modulation

IEEE Journal of Solid-State Circuits

Volumn 25, Issue 2, 1990, Pages 431-440

  Rebeschini, Mike ^a   Van Bavel, Nicholas R ^b   Greene, Robert ^a   Caldwell, James ^a   Haug, John R ^a  

^a MOTOROLA INC   (United States)

^b MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DELTA MODULATION; ELECTRONIC CIRCUITS; INTEGRATED CIRCUITS; MODULATORS; SEMICONDUCTOR DEVICES, MOS;

AUTOZEROED INTEGRATOR; CMOS A/D CONVERTER; COMB DECIMATION FILTER; DOUBLE-POLY CMOS PROCESS; SIGMA-DELTA MODULATION; SWITCHED-CAPACITOR CIRCUITS;

DATA CONVERSION, ANALOG TO DIGITAL;

EID: 0025417093     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.52167     Document Type: Article

References (14)

1. Y. Matsuya et al., “A 16-bit oversampling A-to-D conversion technology using triple integration noise shaping,” IEEE J. Solid-State State Circuits, vol. SC-22, no. 6, pp. 921–929, Dec. 1987.
2. D. Welland et al., “A stereo 16-bit delta—sigma A/D converter for digital audio,” presented at the 85th Cony. Audio Engineering Soc., Nov. 1988.
3. R. Adams, “Design and implementation of an audio 18-bit A/D converter using oversampling techniques,” presented at the 77th Cony. Audio Engineering Soc., Mar. 1985.
4. S. Norsworthy, I. G. Post, and H. S. Fetterman, “A 14-bit 80-kHz sigma—delta A/D converter: Modeling, design, and performance evaluation,” IEEE J. Solid-State Circuits, vol. 24, no. 2, pp. 256–266, Apr. 1989.
5. L. Longo and M. Copeland, “A 13 bit ISDN-band oversampled ADC using two-stage third order noise shaping,” in Proc. IEEE 1988 CIC Conf., p. 21.2.14.
6. R. Koch et al., “A 12-bit sigma—delta analog-to-digital converter with a 15-MHz clock rate,” IEEE J. Solid-State Circuits, vol. SC-21, no. 6, 1003–1010, Dec. 1986.
7. M. Rebeschini et al., “A high resolution CMOS sigma—delta A/D converter with 320 kHz output rate,” in Proc. IEEE 1989 ISCAS Conf
8. M. Rebeschini et al., “A 16-bit 160 kHz CMOS A/D converter using sigma—delta modulation,” in Proc. IEEE 1989 CIC Conf
9. J. Candy, “A use of double integration in sigma delta modulation,” IEEE Trans. Commun., vol. COM-33, no. 3, Mar. 1985.
10. M. Hauser and R. Brodersen, “Circuit and technology considerations for MOS delta—sigma A/D converters,” in ISCAS Proc., 1986.
11. S. Tewksbury et al., “Oversampled, linear predictive and noise-shaping shaping coders of order N >I,” IEEE Trans. Circuits Syst., vol. CAS-25, no. 7, July 1978.
12. S. Chu and C. Burrus, “Multirate filter designs using comb filters,” IEEE Trans. Circuits Syst., vol. CAS-31, no. 11, Nov. 1984.
13. E. Hogenauer, “An economical class of digital filters for decimation and interpolation,” IEEE Trans. Acoustics, Speech, Signal Processing, vol. ASSP-29, no. 2, Apr. 1981.
14. K. Haug, F. Maloberti, and G. Temes, “Switched-capacitor integrators with low finite-gain sensitivity,” Electron. Lett., vol. 21, no. 24, Nov. 1985