Optimized Synthesis of Concurrently Checked Controllers

IEEE Transactions on Computers

Volumn 39, Issue 4, 1990, Pages 419-425

  Leveugle, Régis ^a   Saucier, Gabrièle ^a  

^a GRENOBLE INSTITUTE OF TECHNOLOGY   (France)

Author keywords

Concurrent checking; control flow checking; controller synthesis; signature analysis; state assignment; VLSI design

Indexed keywords

MATHEMATICAL TECHNIQUES--GRAPH THEORY;

CONCURRENTLY CHECKED CONTROLLERS; CONTROL FLOW GRAPH; ONLINE TEST FACILITIES; PERMANENT FAULTS; SIGNATURE ANALYSIS; TRANSIENT ERRORS;

COMPUTER SYSTEMS, DIGITAL;

EID: 0025414885     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.54835     Document Type: Article

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