-
1
-
-
0021989894
-
Computer Architecture for Digital Signal Processing
-
May
-
J. Allen, "Computer Architecture for Digital Signal Processing," Proc. IEEE, vol. 73, no. 5, pp. 854–873, May 1985.
-
(1985)
Proc. IEEE
, vol.73
, Issue.5
, pp. 854-873
-
-
Allen, J.1
-
2
-
-
4243115469
-
The Yorktown Silicon Compiler
-
D. Gajski, ed.
-
R. K. Brayton, R. Camposano, G. De Micheli, R. H. J. H. Otten, and J. van Eijndhoven, "The Yorktown Silicon Compiler," in D. Gajski, ed., "Silicon Compilation," pp. 204–310, 1988.
-
(1988)
Silicon Compilation
, pp. 204-310
-
-
Brayton, R.K.1
Camposano, R.2
De Micheli, G.3
Otten, R.H.J.H.4
van Eijndhoven, J.5
-
3
-
-
0023963074
-
Architectural Strategies for an Application-Specific Synchronous Multiprocessor Environment
-
Feb.
-
F. Catthoor, J. Rabaey, C. Goossens, J. Van Meerbergen, R. Jain, H. De Man, and J. Vandewalle, "Architectural Strategies for an Application-Specific Synchronous Multiprocessor Environment," IEEE Trans. Acoust, Speech, Signal Processing, vol. 36, no. 2, pp. 265–284, Feb. 1988.
-
(1988)
IEEE Trans. Acoust, Speech, Signal Processing
, vol.36
, Issue.2
, pp. 265-284
-
-
Catthoor, F.1
Rabaey, J.2
Goossens, C.3
Van Meerbergen, J.4
Jain, R.5
De Man, H.6
Vandewalle, J.7
-
4
-
-
0023709483
-
Customized Architectural Methodologies for High-Speed Image and Video Processing
-
New York, NY: IEEE
-
F. Catthoor and H. De Man, "Customized Architectural Methodologies for High-Speed Image and Video Processing," in Proc. IEEE Int. Conf. Acoust, Speech, Signal Processing. New York, NY: IEEE, 1988, pp. 1985–1988.
-
(1988)
Proc. IEEE Int. Conf. Acoust, Speech, Signal Processing
, pp. 1985-1988
-
-
Catthoor, F.1
De Man, H.2
-
5
-
-
0024099459
-
Simulated-Annealing based Optimisation of Coefficient and Data Word-lengths in Digital Filters
-
Sep.
-
F. Catthoor, J. Vandewalle, and H. De Man, "Simulated-Annealing based Optimisation of Coefficient and Data Word-lengths in Digital Filters," Int. J. Circuit Theory and Applications, vol. 16, pp. 371–390, Sep. 1988.
-
(1988)
Int. J. Circuit Theory and Applications
, vol.16
, pp. 371-390
-
-
Catthoor, F.1
Vandewalle, J.2
De Man, H.3
-
6
-
-
0024892939
-
Target Architectures in the Cathedral Synthesis Systems: Objectives and Design Experience
-
(Portland, OR, May)
-
F. Catthoor, J. Rabaey, and H. De Man, "Target Architectures in the Cathedral Synthesis Systems: Objectives and Design Experience," in Proc. IEEE Int. Symp. on Cric. and Systems (Portland, OR, May 1989).
-
(1989)
Proc. IEEE Int. Symp. on Cric. and Systems
-
-
Catthoor, F.1
Rabaey, J.2
De Man, H.3
-
7
-
-
0024934702
-
Application-Specific Microcoded Architectures for Efficient Fixed-Rate DFT and FFT
-
(Portland, OR, May)
-
F. Catthoor, D. Lanneer, and H. De. Man, "Application-Specific Microcoded Architectures for Efficient Fixed-Rate DFT and FFT," Proc. IEEE Int. Symp. on Circ. and Systems (Portland, OR, May 1989).
-
(1989)
Proc. IEEE Int. Symp. on Circ. and Systems
-
-
Catthoor, F.1
Lanneer, D.2
De. Man, H.3
-
8
-
-
84944997122
-
Testability Strategy for Multi-Processor Architecture in a Silicon Compilation Environment
-
Apr.
-
F. Catthoor, J. Van Sas, L. Inze, and H. De Man, "Testability Strategy for Multi-Processor Architecture in a Silicon Compilation Environment," IEEE Design and Test of Computers, Apr. 1989.
-
(1989)
IEEE Design and Test of Computers
-
-
Catthoor, F.1
Van Sas, J.2
Inze, L.3
De Man, H.4
-
9
-
-
0022983013
-
A CAD Environment for the thorough Analysis, Simulation and Characterization of VLSI implementable DSP Systems
-
(Port Chester, NY, Oct.)
-
L. Claesen, F. Catthoor, H. De Man, J. Vandewalle, S. Note, and K. Mertens, "A CAD Environment for the thorough Analysis, Simulation and Characterization of VLSI implementable DSP Systems," in Proc. IEEE Int. Conf. on Computer Design (Port Chester, NY, Oct. 1986), pp. 72–75.
-
(1986)
Proc. IEEE Int. Conf. on Computer Design
, pp. 72-75
-
-
Claesen, L.1
Catthoor, F.2
De Man, H.3
Vandewalle, J.4
Note, S.5
Mertens, K.6
-
10
-
-
0024137953
-
Automatic Synthesis of Signal Processing Benchmark using the Cathedral Silicon Compilers
-
(Rochester, NY, May), Paper 14.7/1–4.
-
L Claesen, F. Catthoor, D. Lanneer, G. Goossens, S. Note, J. Van Meerbergen, and H. De Man, "Automatic Synthesis of Signal Processing Benchmark using the Cathedral Silicon Compilers," in Proc. IEEE Custom Integrated Circuits Conf. (Rochester, NY, May 1988), Paper 14.7/1–4.
-
(1988)
Proc. IEEE Custom Integrated Circuits Conf.
-
-
Claesen, L.1
Catthoor, F.2
Lanneer, D.3
Goossens, G.4
Note, S.5
Van Meerbergen, J.6
De Man, H.7
-
12
-
-
0024928608
-
Inter-Processor Communication in Synchronous Multi-Processor Digital Signal Processing Chips
-
J. Decaluwe, J. Rabaey, J. Van Meerbergen, and H. De Man, "Inter-Processor Communication in Synchronous Multi-Processor Digital Signal Processing Chips," to be published in IEEE Transactions on Acoustics, Speech and Signal Processing, 1989.
-
(1989)
IEEE Transactions on Acoustics, Speech and Signal Processing
-
-
Decaluwe, J.1
Rabaey, J.2
Van Meerbergen, J.3
De Man, H.4
-
13
-
-
84941455821
-
Evolution of CAD-Tools towards Third Generation Custom VLSI-Design
-
(Toulouse, France, Sep.)
-
H. De Man, "Evolution of CAD-Tools towards Third Generation Custom VLSI-Design," in Digest Europ. Conf. on Solid-State Circuits (Toulouse, France, Sep. 1985) pp. 256–256c.
-
(1985)
Digest Europ. Conf. on Solid-State Circuits
, pp. 256
-
-
De Man, H.1
-
14
-
-
0022914434
-
Cathedral-II: a Silicon Compiler for Digital Signal Processing
-
Dec.
-
H. De Man, J. Rabaey, P. Six, and L. Claesen, "Cathedral-II: a Silicon Compiler for Digital Signal Processing," IEEE Design and Test Magazine, pp. 13–25, Dec. 1986.
-
(1986)
IEEE Design and Test Magazine
, pp. 13-25
-
-
De Man, H.1
Rabaey, J.2
Six, P.3
Claesen, L.4
-
15
-
-
84944984535
-
Silicon Compilation of DSP Systems with Cathedral-II
-
Brussels, Sep.
-
H. De Man, J. Rabaey, J. Huisken, and J. Van Meerbergen, "Silicon Compilation of DSP Systems with Cathedral-II," ESPRIT Technical Week, Brussels, Sep. 1987.
-
(1987)
ESPRIT Technical Week
-
-
De Man, H.1
Rabaey, J.2
Huisken, J.3
Van Meerbergen, J.4
-
16
-
-
0022953026
-
Performance-Oriented Synthesis in the Yorktown Silicon Compiler
-
G. De Micheli, "Performance-Oriented Synthesis in the Yorktown Silicon Compiler," in Proc. IEEE Int. Conf. on Comp.-Aided Design, 1986, pp. 138–141.
-
(1986)
Proc. IEEE Int. Conf. on Comp.-Aided Design
, pp. 138-141
-
-
De Micheli, G.1
-
18
-
-
0022669613
-
Wave Digital Filters: Theory and Practice
-
Feb.
-
A. Fettweis, "Wave Digital Filters: Theory and Practice," Proc. IEEE, vol. 74, no. 2, pp. 270–327, Feb. 1986.
-
(1986)
Proc. IEEE
, vol.74
, Issue.2
, pp. 270-327
-
-
Fettweis, A.1
-
19
-
-
0022332173
-
Telecommunications Circuit Design using the Silc Silicon Compiler
-
(Port Chester, NY, Oct.)
-
J. R. Fox and J. A. Fried, "Telecommunications Circuit Design using the Silc Silicon Compiler," in Proc. IEEE Int. Conf. Computer Design (Port Chester, NY, Oct. 1985) pp. 213–219.
-
(1985)
Proc. IEEE Int. Conf. Computer Design
, pp. 213-219
-
-
Fox, J.R.1
Fried, J.A.2
-
20
-
-
0004326293
-
-
ed. Reading, MA: Addison-Wesley
-
D. Gajski, ed., Silicon Compilation. Reading, MA: Addison-Wesley, 1988.
-
(1988)
Silicon Compilation
-
-
Gajski, D.1
-
21
-
-
84935280957
-
signal, a Declarative Language for Synchronous Programming of Real-Time Systems
-
(Functional Languages and Computer Architectures)
-
T. Gautier and P. Le Guernic, "signal, a Declarative Language for Synchronous Programming of Real-Time Systems," Lecfure Notes in Computer Science, vol. 274, (Functional Languages and Computer Architectures), pp. 257–277, 1987.
-
(1987)
Lecfure Notes in Computer Science
, vol.274
, pp. 257-277
-
-
Gautier, T.1
Le Guernic, P.2
-
22
-
-
0021784916
-
Explicit Formulas for Lattice Wave Digital Filters
-
Jan.
-
L. Gazsi, "Explicit Formulas for Lattice Wave Digital Filters," IEEE Trans. Circuits Syst., vol. CAS-32, pp. 68–88, Jan. 1985.
-
(1985)
IEEE Trans. Circuits Syst.
, vol.CAS-32
, pp. 68-88
-
-
Gazsi, L.1
-
23
-
-
84939763611
-
An Optimal and Flexible Delay Management Technique for VLSI
-
C. I. Byrnes and A. Lindquist eds. Amsterdam, The Netherlands: Elsevier
-
C.Goossens, R.Jain, J. Vandewalle, and H. De Man, "An Optimal and Flexible Delay Management Technique for VLSI," in C. I. Byrnes and A. Lindquist eds., Computational and Combinatorial Methods in Systems Theory, Amsterdam, The Netherlands: Elsevier, 1986, pp. 409–418.
-
(1986)
Computational and Combinatorial Methods in Systems Theory
, pp. 409-418
-
-
Goossens, C.1
Jain, R.2
Vandewalle, J.3
De Man, H.4
-
24
-
-
0023570590
-
An Efficient Microcode-Compiler for Custom DSP-Processors
-
(Santa Clara, CA, Nov.)
-
G. Goossens, J. Rabaey, J. Vandewalle and H. De Man, "An Efficient Microcode-Compiler for Custom DSP-Processors," in Proc. IEEE Int. Conf. Comp.-Aided Design (Santa Clara, CA, Nov. 1987), pp. 24–27.
-
(1987)
Proc. IEEE Int. Conf. Comp.-Aided Design
, pp. 24-27
-
-
Goossens, G.1
Rabaey, J.2
Vandewalle, J.3
De Man, H.4
-
25
-
-
0024883468
-
Loop Optimization in Register-Transfer Scheduling for DSP-Systems
-
(Las Vegas, NV, June)
-
G. Goossens, J. Vandewalle, and H. De Man, "Loop Optimization in Register-Transfer Scheduling for DSP-Systems," in Proc. 26th ACM/IEEE Design Automation Conf. (Las Vegas, NV, June 1989), pp. 826–831.
-
(1989)
Proc. 26th ACM/IEEE Design Automation Conf.
, pp. 826-831
-
-
Goossens, G.1
Vandewalle, J.2
De Man, H.3
-
26
-
-
0024175284
-
Automatic Synthesis of a Multi-Bus Architecture for DSP
-
(Santa Clara, CA, Nov.)
-
B. S. Haroun and M. I. Elmasry, "Automatic Synthesis of a Multi-Bus Architecture for DSP," in Proc. lEEEInt. Conf. Comp. Aided Design (Santa Clara, CA, Nov. 1988), pp. 44-47.
-
(1988)
Proc. lEEEInt. Conf. Comp. Aided Design
, pp. 44-47
-
-
Haroun, B.S.1
Elmasry, M.I.2
-
27
-
-
0024055843
-
Behavioral to Structural Translation in a Bit-Serial Silicon Compiler
-
Aug.
-
R. I. Hartley and J. R. Jasica, "Behavioral to Structural Translation in a Bit-Serial Silicon Compiler," IEEE Trans. Computer-Aided Design, vol. CAD-7, no. 8, pp. 877–886, Aug. 1988.
-
(1988)
IEEE Trans. Computer-Aided Design
, vol.CAD-7
, Issue.8
, pp. 877-886
-
-
Hartley, R.I.1
Jasica, J.R.2
-
28
-
-
0022201679
-
A High-Level Language and Silicon Compiler for Digital Signal Processing
-
(Portland, OR, May)
-
P. N. Hilfinger, "A High-Level Language and Silicon Compiler for Digital Signal Processing," in Proc. IEEE Custom Integrated Circuits Conf. (Portland, OR, May 1985), pp. 213–216.
-
(1985)
Proc. IEEE Custom Integrated Circuits Conf.
, pp. 213-216
-
-
Hilfinger, P.N.1
-
29
-
-
84944997123
-
Design of DSP Systems using the Piramid Library and Design Tools
-
(Grenoble, France, May)
-
J. Huisken, H. Janssens, P. Lippens, O. McArdle, R. Segers, P. Zegers, A. Delaruelle, and J. v. Meerbergen, "Design of DSP Systems using the Piramid Library and Design Tools," in Proc. Int. Workshop on Logic and Arch. Synthesis for Silicon Compilers (Grenoble, France, May 1988).
-
(1988)
Proc. Int. Workshop on Logic and Arch. Synthesis for Silicon Compilers
-
-
Huisken, J.1
Janssens, H.2
Lippens, P.3
McArdle, O.4
Segers, R.5
Zegers, P.6
Delaruelle, A.7
V. Meerbergen, J.8
-
30
-
-
0022669074
-
Custom Integration of PCM-FDM Transmultiplexer using a Computer-Aided Design Methodology
-
Feb.
-
R. Jain, F. Catthoor, J. Vanhoof, B. De Loore, L. Claesen, J. Van Ginderdeuren, H. De Man, and J. Vandewalle, "Custom Integration of PCM-FDM Transmultiplexer using a Computer-Aided Design Methodology," IEEE Trans. Circuits Syst., vol. CAS-33, pp. 183–195, Feb. 1986.
-
(1986)
IEEE Trans. Circuits Syst.
, vol.CAS-33
, pp. 183-195
-
-
Jain, R.1
Catthoor, F.2
Vanhoof, J.3
De Loore, B.4
Claesen, L.5
Van Ginderdeuren, J.6
De Man, H.7
Vandewalle, J.8
-
31
-
-
0023004652
-
The Automatic Synthesis of Data Processing Systems
-
(Port Chester, NY, Oct.)
-
R. Jamier, N. Bekkara, and A. Jerraya, "The Automatic Synthesis of Data Processing Systems," in Proc. IEEE Int. Conf. on Computer Design (Port Chester, NY, Oct. 1986) pp. 64–67.
-
(1986)
Proc. IEEE Int. Conf. on Computer Design
, pp. 64-67
-
-
Jamier, R.1
Bekkara, N.2
Jerraya, A.3
-
32
-
-
0022335085
-
Architecture Construction for a General Silicon Compiler System
-
(Port Chester, NY)
-
H. Joepen and M. Glesner, "Architecture Construction for a General Silicon Compiler System," in Proc. IEEE Int. Conf. on Computer Design (Port Chester, NY, 1985), pp. 312–316.
-
(1985)
Proc. IEEE Int. Conf. on Computer Design
, pp. 312-316
-
-
Joepen, H.1
Glesner, M.2
-
33
-
-
0019923189
-
Why Systolic Architectures?
-
Jan.
-
H. T. Kung, "Why Systolic Architectures?," IEEE Computer Magazine, vol. 15(1), pp. 37–46, Jan. 1982.
-
(1982)
IEEE Computer Magazine
, vol.15
, Issue.1
, pp. 37-46
-
-
Kung, H.T.1
-
34
-
-
0020504458
-
Optimizing Synchronous Circuitry by Retiming
-
R. Bryant, ed. Boston, MA: Computer Science Press
-
C. Leiserson and J. Saxe, "Optimizing Synchronous Circuitry by Retiming," in R. Bryant, ed., Third Caltech Conference on VLSI. Boston, MA: Computer Science Press, 1983.
-
(1983)
Third Caltech Conference on VLSI
-
-
Leiserson, C.1
Saxe, J.2
-
35
-
-
0024122573
-
Automated Synthesis of a High-speed CORDIC Algorithm with the CATHEDRAL-III Compilation System
-
(Helsinki, Finland, June)
-
S. Note, J. Van Meerbergen, F. Catthoor, and H. De Man, "Automated Synthesis of a High-speed CORDIC Algorithm with the CATHEDRAL-III Compilation System," in Proc. IEEE Int. Symp. on Circuits and Systems (Helsinki, Finland, June 1988), pp. 581–584.
-
(1988)
Proc. IEEE Int. Symp. on Circuits and Systems
, pp. 581-584
-
-
Note, S.1
Van Meerbergen, J.2
Catthoor, F.3
De Man, H.4
-
36
-
-
84944997124
-
Hard-Wired Data-Path Synthesis for High-Speed DSP Systems with the Cathedral-III Compilation Environment
-
(Grenoble, France, May)
-
S. Note, J. Van Meerbergen, F. Catthoor, and H. De Man, "Hard-Wired Data-Path Synthesis for High-Speed DSP Systems with the Cathedral-III Compilation Environment," in Proc. Int. Workshop on Logic and Architecture Synthesis (Grenoble, France, May 1988).
-
(1988)
Proc. Int. Workshop on Logic and Architecture Synthesis
-
-
Note, S.1
Van Meerbergen, J.2
Catthoor, F.3
De Man, H.4
-
37
-
-
0022989383
-
State Synthesis and Connectivity Binding for Microarchitecture Compilation
-
(Santa Clara, CA, Nov.)
-
B. M. Pangrle and D. Gajski, "State Synthesis and Connectivity Binding for Microarchitecture Compilation," in Proc. IEEE Int. Conf. Comp.-Aided Design (Santa Clara, CA, Nov. 1986), pp. 210–213.
-
(1986)
Proc. IEEE Int. Conf. Comp.-Aided Design
, pp. 210-213
-
-
Pangrle, B.M.1
Gajski, D.2
-
38
-
-
0023983163
-
Sehwa, a Software Package for Synthesis of Pipelines from Behavioral Specifications
-
Mar.
-
N. Park and A. C. Parker, "Sehwa, a Software Package for Synthesis of Pipelines from Behavioral Specifications," IEEE Trans. on Comp. Aided Design, vol. CAD-7, no. 3, pp. 356–370, Mar. 1988.
-
(1988)
IEEE Trans. on Comp. Aided Design
, vol.CAD-7
, Issue.3
, pp. 356-370
-
-
Park, N.1
Parker, A.C.2
-
39
-
-
0023230724
-
Force-Directed Scheduling in Automatic Data Path Synthesis
-
(Miami, FL, July)
-
P. G. Paulin and J. P. Knight, "Force-Directed Scheduling in Automatic Data Path Synthesis," in Proc. 24th IEEE/ACM Design Automation Conf. (Miami, FL, July 1987), pp. 195–202.
-
(1987)
Proc. 24th IEEE/ACM Design Automation Conf.
, pp. 195-202
-
-
Paulin, P.G.1
Knight, J.P.2
-
40
-
-
26644445984
-
Synthesis of VLSI Systems with the CAMAD Design Aid
-
(Las Vegas, NV, June)
-
Z. Peng, "Synthesis of VLSI Systems with the CAMAD Design Aid," in Proc. 23rd ACM/IEEE Design Automation Conf. (Las Vegas, NV, June 1986), pp. 278-284.
-
(1986)
Proc. 23rd ACM/IEEE Design Automation Conf.
, pp. 278-284
-
-
Peng, Z.1
-
41
-
-
84869989576
-
Automated Generation of Signal Processing Circuits
-
Doctoral Dissertation, U.C. Berkeley, Feb.
-
S. Pope, "Automated Generation of Signal Processing Circuits," Doctoral Dissertation, U.C. Berkeley, Feb. 1985.
-
(1985)
-
-
Pope, S.1
-
42
-
-
0009601410
-
An Integrated Automatic Layout Generation System for DSP Circuits
-
July
-
J. Rabaey, S. Pope, and R. Broderson, "An Integrated Automatic Layout Generation System for DSP Circuits," lEEETrans. on Computer-Aided Design, vol. CAD-4, no. 3, pp. 285–296, July 1985.
-
(1985)
IEEE Trans. on Computer-Aided Design
, vol.CAD-4
, Issue.3
, pp. 285-296
-
-
Rabaey, J.1
Pope, S.2
Broderson, R.3
-
43
-
-
0023268305
-
Cathedral II: Computer Aided Synthesis of Digital Signal Processing Systems
-
(Portland, OR, May)
-
J. Rabaey, J. Vanhoof, G. Goossens, F. Catthoor, and H. De Man, "Cathedral II: Computer Aided Synthesis of Digital Signal Processing Systems," in Proc. IEEE Custom Integrated Circuits Conf. (Portland, OR, May 1987), pp. 157–160.
-
(1987)
Proc. IEEE Custom Integrated Circuits Conf.
, pp. 157-160
-
-
Rabaey, J.1
Vanhoof, J.2
Goossens, G.3
Catthoor, F.4
De Man, H.5
-
44
-
-
0343329589
-
Cathedral-II: A Synthesis System for Multi-Processor DSP Systems
-
D. Gajski, ed.
-
J. Rabaey, H. De Man, J. Vanhoof, G. Goossens, and F. Catthoor, "Cathedral-II: A Synthesis System for Multi-Processor DSP Systems," in D. Gajski, ed., Silicon Compilation, pp. 311–360, 1988.
-
(1988)
Silicon Compilation
, pp. 311-360
-
-
Rabaey, J.1
De Man, H.2
Vanhoof, J.3
Goossens, G.4
Catthoor, F.5
-
45
-
-
0142080789
-
The Timber Wolf Placement and Routing Package
-
(Rochester, NY, May)
-
C. Sechen, A. Sangiovanni-Vincentelli, "The Timber Wolf Placement and Routing Package," in Proc. IEEE Custom Integr. Circuits Conf. (Rochester, NY, May 1984), pp. 522–527.
-
(1984)
Proc. IEEE Custom Integr. Circuits Conf.
, pp. 522-527
-
-
Sechen, C.1
Sangiovanni-Vincentelli, A.2
-
46
-
-
38049095084
-
An Intelligent Module Generator Environment
-
(Las Vegas, NV, June)
-
P. Six, L. Claesen, J. Rabaey, and H. De Man, "An Intelligent Module Generator Environment," in Proc. 23rd ACM/IEEE Design Automation Conf. (Las Vegas, NV, June 1986), pp. 730–735.
-
(1986)
Proc. 23rd ACM/IEEE Design Automation Conf.
, pp. 730-735
-
-
Six, P.1
Claesen, L.2
Rabaey, J.3
De Man, H.4
-
47
-
-
0019150606
-
A Novel Method for Pitch Extraction from Speech and a Hardware Model applicable to Vocoder Systems
-
(Denver, CO, April)
-
R. J. Sluyter, H. J. Kotmans, and A. van Leeuwarden, "A Novel Method for Pitch Extraction from Speech and a Hardware Model applicable to Vocoder Systems,"in Proc. lEEE Int. Conf. on Acoustics, Speech and Signal Processing (Denver, CO, April 1980), pp. 45–48.
-
(1980)
Proc. lEEE Int. Conf. on Acoustics, Speech and Signal Processing
, pp. 45-48
-
-
Sluyter, R.J.1
Kotmans, H.J.2
van Leeuwarden, A.3
-
48
-
-
0020989416
-
Mac Pitts: An Approach to Silicon Compilation
-
Dec.
-
J. Southhard, " Mac Pitts: An Approach to Silicon Compilation,"IEEE Computer Magazine, vol. 16, no. 12, 74–87, Dec. 1983.
-
(1983)
IEEE Computer Magazine
, vol.16
, Issue.12
, pp. 74-87
-
-
Southhard, J.1
-
50
-
-
0022756374
-
Automated Synthesis of Data Paths in Digital Systems
-
July
-
C.-J. Tseng and D. Siewiorek, " Automated Synthesis of Data Paths in Digital Systems,"IEEE Trans. on Computer-aided Design, vol. CAD-5, no. 3, pp. 379–395, July 1986.
-
(1986)
IEEE Trans. on Computer-aided Design
, vol.CAD-5
, Issue.3
, pp. 379-395
-
-
Tseng, C.-J.1
Siewiorek, D.2
-
51
-
-
84944997126
-
MOS Digital Fiter Deisgn
-
B. Goodwin, ed. Englewood Cliffs, NJ: Prentice-Hall
-
W. Ulbrich, "MOS Digital Fiter Deisgn," in B. Goodwin, ed., MOS IC Design for Telecommunications. Englewood Cliffs, NJ: Prentice-Hall, 1985.
-
(1985)
MOS IC Design for Telecommunications
-
-
Ulbrich, W.1
-
52
-
-
0022327132
-
Design of Dedicated MOS Digital Filters for High-Speed Applications
-
(Kyoto, Japan, June)
-
W. Ulbrich and T. G. Noll, "Design of Dedicated MOS Digital Filters for High-Speed Applications," in Proc. IEEE Int. Symp. on Circ. and Systems (Kyoto, Japan, June 1985), pp. 255–258.
-
(1985)
Proc. IEEE Int. Symp. on Circ. and Systems
, pp. 255-258
-
-
Ulbrich, W.1
Noll, T.G.2
-
53
-
-
0012111580
-
Background Memory Management for the Synthesis of Algebraic Algorithms on Multi-Processor DSP Chips
-
(Munich, West Germany, Aug.)
-
I. Verbauwhede, F. Catthoor, J. Vandewalle, and H. De Man, "Background Memory Management for the Synthesis of Algebraic Algorithms on Multi-Processor DSP Chips," in Proc. IFIP Int. Conf. on VLSI (Munich, West Germany, Aug. 1989), pp. 209–218.
-
(1989)
Proc. IFIP Int. Conf. on VLSI
, pp. 209-218
-
-
Verbauwhede, I.1
Catthoor, F.2
Vandewalle, J.3
De Man, H.4
-
54
-
-
0020770381
-
Compact NMOS Building Blocks and a Methodology for Dedicated Digital Filter Applications
-
June
-
J. Van Ginderdeuren, H. De Man, N. Goncalves, and W. Van Noije, "Compact NMOS Building Blocks and a Methodology for Dedicated Digital Filter Applications," IEEE J. Solid-state Circ., vol. SC-18, pp. 306–316, June 1983.
-
(1983)
IEEE J. Solid-state Circ.
, vol.SC-18
, pp. 306-316
-
-
Van Ginderdeuren, J.1
De Man, H.2
Goncalves, N.3
Van Noije, W.4
-
55
-
-
84939764383
-
A Design Methodology for Compact Integration of Wave Digital Filters
-
(Edinburgh, UK, Sep.)
-
J. Van Ginderdeuren, H. De Man, F. Catthoor, and S. Beckers, "A Design Methodology for Compact Integration of Wave Digital Filters," in Digest Europ. Solid-State Circuits Conf. (Edinburgh, UK, Sep. 1984), pp. 210–213.
-
(1984)
Digest Europ. Solid-State Circuits Conf.
, pp. 210-213
-
-
Van Ginderdeuren, J.1
De Man, H.2
Catthoor, F.3
Beckers, S.4
-
56
-
-
84942485888
-
A Knowledge Based CAD System for Synthesis of Multi-Processor Digital Signal Processing Chips
-
(Vancouver, Canada, Aug.)
-
J. Vanhoof, J. Rabaey, and H. De Man, "A Knowledge Based CAD System for Synthesis of Multi-Processor Digital Signal Processing Chips," in Proc. IFIP Int. Conf. on VLSI (Vancouver, Canada, Aug. 1987), pp. 41–46.
-
(1987)
Proc. IFIP Int. Conf. on VLSI
, pp. 41-46
-
-
Vanhoof, J.1
Rabaey, J.2
De Man, H.3
-
57
-
-
0024620330
-
A True Silicon Compiler for the Design of Complex IC's for Digital Signal Processing
-
Feb.
-
J. Van Meerbergen, and H. De Man, "A True Silicon Compiler for the Design of Complex IC's for Digital Signal Processing," Philips Technical Review, vol. 44, no. 7, pp. 228–241, Feb. 1989.
-
(1989)
Philips Technical Review
, vol.44
, Issue.7
, pp. 228-241
-
-
Van Meerbergen, J.1
De Man, H.2
|