Multiple-Valued Radix-2 Signed-Digit Arithmetic Circuits for High-Performance VLSI Systems

IEEE Journal of Solid-State Circuits

Volumn 25, Issue 1, 1990, Pages 125-131

  Kawahito, Shoji ^a   Kameyama, Michitaka ^b   Higuchi, Tatsuo ^b  

^a TOYOHASHI UNIVERSITY OF TECHNOLOGY   (Japan)

^b TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COMPUTERS, DIGITAL - CIRCUITS; INTEGRATED CIRCUITS, CMOS;

DATA-BUS AREA; HIGH-PERFORMANCE VLSI; MOS ARITHMETIC CIRCUITS; RADIX-2; SIGNED-DIGIT ARITHMETIC CIRCUITS; SPICE SIMULATION;

INTEGRATED CIRCUITS, VLSI;

EID: 0025384858     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.50294     Document Type: Article

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