Design for Test Using Partial Parallel Scan

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 9, Issue 2, 1990, Pages 203-211

  Lee, Sunggu ^a   Shin, Kang G ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

CAD for fault tolerance; Partial scan; Scan design; Testable design; Testing and maintenance; W complete

Indexed keywords

OPTIMIZATION;

NP-COMPLETE; PARTIAL PARALLEL SCAN; SCAN DESIGN; SILICON COMPILER TOOLS; TESTABLE DESIGN;

INTEGRATED CIRCUITS, VLSI;

EID: 0025383487     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.46787     Document Type: Article

References (16)

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