A 300-MHz CMOS Voltage-Controlled Ring Oscillator

IEEE Journal of Solid-State Circuits

Volumn 25, Issue 1, 1990, Pages 312-315

  Enam, S K ^a   Abidi, Asad A ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, CMOS;

RING OSCILLATOR; SINUSOIDAL WAVEFORM; VOLTAGE-CONTROLLED RING OSCILLATOR;

OSCILLATORS;

EID: 0025382944     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.50320     Document Type: Article

References (5)

1. T. Yamada et all., “A 1.2 GHz single chip NMOS PLL,” in ISSCC Dig. Tech. Papers, vol. 32, 1985, pp. 24–25
2. S. K. Enam and A. A. Abidi, “A gigahertz voltage controlled ring oscillator,” Electron. Lett., vol. 22, pp. 677–679, June 5, 1986.
3. R. J. Bayruns et. al., “Delay analysis of Si NMOS Gb/s logic circuits,” IEEE J. Solid-State Circuits, vol. SC-19, pp. 755–764, Oct. 1984.
4. A. G. Bell and G. Borriello, “A single chip NMOS Ethernet controller,” in ISSCC Dig. Tech. Papers, vol. 30, Feb. 1983, pp. 70–71.
5. M. Banu, “100 kHz-1 GHz NMOS variable frequency oscillator with analog and digital control,” in ISSCC Dig. Tech. Papers, vol. 31, Feb. 1988, p. 20–21.