A ULSI 2-D Capacitance Simulator for Complex Structures Based on Actual Processes

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 9, Issue 1, 1990, Pages 39-47

  Fukuda, Sanae ^a   Shigyo, Naoyuki ^a   Kato, Koichi ^a   Nakamura, Shin ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC MEASUREMENTS--CAPACITANCE; MATHEMATICS TECHNIQUES--BOUNDARY ELEMENT METHODS;

DISTRIBUTED CAPACITANCES; ULTRA-LARGE-SCALE INTEGRATED (ULSI) CIRCUITS;

INTEGRATED CIRCUITS;

EID: 0025213718     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.45855     Document Type: Article

References (17)

1. Y. Nakagome, M. Aoki, S. Ikenaga, M. Horiguchi, S. Kimura, Y. Kawamoto, and K. Itoh, “The impact of data-line interference noise on DRAM scaling,” IEEE J. Solid-State Circuits, vol. 23, pp. 1120–1127, 1988.
2. R. L. M. Dang and N. Shigyo, “Coupling capacitances for two-dimensional wires,” IEEE Trans. Electron Device Lett., vol. EDL-2, pp. 196–197, 1981.
3. P. E. Cottrel and E. M. Buturla, “VLSI wiring capacitance,” IBM J. Res. Develop., vol. 29, pp. 277–288, 1985.
4. F. Straker and S. Selberherr, “Computation of wire and junction capacitance in VLSI structures,” in Proc. V-MIC Conf., pp. 209–217, 1984.
5. R. H. Uebbing and M. Fukuma, “Process-based three-dimensional capacitance simulation—TRICEPS,” IEEE Trans. Computer-Aided Design, vol. CAD-5, pp. 215–220, 1986.
6. A. Seidl, H. Klose, M. Svoboda, J. Oberndorfer, and W. Rosner, “CAPCAL—A 3-D capacitance solver for support of CAD systems,” IEEE Trans. Computer-Aided Design, vol. CAD-5, pp. 549–556, 1986.
7. Y. Ushiku, H. Ono, and N. Shigyo, “A three-level wiring capacitance analysis for VLSI's using three-dimensional simulator,” in IEDM Tech. Dig., pp. 340–343, 1988.
8. T. Toyabe, S. Ikenaga, M. Aoki, H. Masuda, and K. Itoh, “Memory cell capacitance simulation in three-dimensions,” in Proc. VLSI Symp., pp. 27–28, 1988.
9. K. Kato, N. Shigyo, S. Onga, M. Konaka, and K. Taniguchi, “A supervised simulation system for process and device designs based on a geometrical data interface,” IEEE Trans. Electron Devices, vol. ED-34, pp. 2049–2058, 1987.
10. C. A. Brebbia, J. C. F. Telles, and L. C. Wrobel, Boundary Element Techniques. New York: Springer-Verlag, 1984.
11. N. Shigyo, K. Sato, K. Kato, and T. Wada, “TRIMEDES: A triangular mesh device simulator linked with topography/process simulation,” Trans. Inst. Electr. Inform. Comm. Eng., vol. E-71, pp. 992–999, 1988.
12. J. C. Lachat and J. O. Watson, “Effective numerical treatment of boundary integral equations: A formulation for three dimensional elaststatics,” Int. J. Numer. Meth. Eng., vol. 10, pp. 991–1005, 1976.
13. A. Ralston and P. Rabinowitz, A First Course in Numerical Analysis. New York: McGraw-Hill, 1965.
14. P. J. Davis and P. Rabinowitz, Methods of Numerical Integration. New York: Academic, 1975.
15. J. M. Crotty, “A block equation solver for large unsymmetric matrices arising in the boundary integral equation method,” Int. J. Numer. Meth. Eng., vol. 18, pp. 997–1017, 1982.
16. J. C. Lachat and J. O. Watson, “Progress in the use of boundary integral equations, illustrated by examples,” Comp. Meth. Appl. Mech. Eng., vol. 10, pp. 273–289, 1977.
17. I. Avigal, “Inter-metal dielectric and passivation-related properties of plasma BPSG,” Solid-State Tech., pp. 217–224, Oct. 1983.