An avalanche multiplication model for bipolar transistors

Solid State Electronics

Volumn 33, Issue 1, 1990, Pages 35-38

  Liou, J J ^a   Yuan, J S ^b  

^a UNIVERSITY OF CENTRAL FLORIDA   (United States)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; SEMICONDUCTOR DIODES, AVALANCHE;

AVALANCHE MULTIPLICATION; GENERATION CURRENT; MULTIPLICATION FACTOR;

TRANSISTORS, BIPOLAR;

EID: 0025066050     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(90)90006-Z     Document Type: Article

References (19)

1. Ionization Rates for Electrons and Holes in Silicon
2. Modeling of avalanche effect in integral charge control model
3. Bandwidth tunable amplifier for recording biopotential signals.
4. Bipolar transistor modeling of avalanche generation for computer circuit simulation
5. Modeling of avalanche generation current of bipolar junction transistors for computer circuit simulation
6. Modeling of narrow-base bipolar transistors including variable-base-charge and avalanche effects
7. High current regimes in transistor collector regions
8. T) falloff at high current densities
9. Collector models for bipolar transistors
10. Base-collector junction capacitance of bipolar transistors operating at high current densities