KUAI-EXACT: A new approach for multi-valued logic minimization in VLSI synthesis

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1989, Pages 401-404

  Perkowski, Marek A ^a   Wu, Pan ^a   Pirkl, Keith A ^a  

^a UNIVERSITY OF PORTLAND   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS, DIGITAL--PARALLEL PROCESSING; INTEGRATED CIRCUITS, VLSI--SYNTHESIS; LOGIC DEVICES--SYNTHESIS;

LOGIC MINIMIZER; MULTIVALUED INPUT LOGIC; PARALLEL COMPUTERS; PROGRAMMABLE LOGIC ARRAYS; VLSI SYNTHESIS;

COMPUTER METATHEORY;

EID: 0024934676     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)