209k-transistor ECL gate array with RAM

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 32, Issue , 1989, Pages 184-185,-335

  Satoh, Hisayasu ^a   Nishimura, Takashi ^a   Tatsuki, Makoto ^a   Ohba, Atsushi ^a   Hine, Shiro ^a   Sakaue, Kiyoshi ^a   Kuramitsu, Yoichi ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS; DATA STORAGE, DIGITAL--RANDOM ACCESS; LOGIC CIRCUITS, EMITTER COUPLED; SEMICONDUCTING SILICON;

DIGEST OF PAPER; ECL GATE ARRAY; RAM; READ CURRENT; TRIPLE-LAYER METALLIZATION; WORD-LINE DRIVERS;

LOGIC DEVICES;

EID: 0024931254     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)