A high performance and highly reliable dual gate CMOS with gate/n- overlapped LDD applicable to the cryogenic operation

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1989, Pages 773-776

  Inuishi, Masahide ^a   Mitsui, Katsuyoshi ^a   Kusunoki, Shigeru ^a   Shimizu, Masahiro ^a   Tsukamoto, Katsuhiro ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CRYOGENICS; SEMICONDUCTOR DEVICES, MOS; SEMICONDUCTOR MATERIALS--DOPING;

DUAL-GATE CMOS; LDD (LIGHTLY DOPED DRAIN); NMOS; PMOS;

INTEGRATED CIRCUITS, CMOS;

EID: 0024926682     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)