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Volumn , Issue , 1989, Pages 520-523
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Critical path issue in VLSI designs
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRIC NETWORKS--TOPOLOGY;
MATHEMATICAL TECHNIQUES--GRAPH THEORY;
COVERAGE FREQUENCIES;
CRITICAL NETS;
CRITICAL PATHS;
SINGLE SCORE FUNCTION;
TOTAL PATH DELAY;
INTEGRATED CIRCUITS, VLSI;
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EID: 0024923636
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (7)
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References (12)
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