Design of parallel hardware neural network systems from custom analog VLSI 'building block' chips

IJCNN Int Jt Conf Neural Network

Volumn , Issue , 1989, Pages 183-190

  Eberhardt, Silvio ^a   Duong, Tuan ^a   Thakoor, Anil ^a  

^a CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS, DIGITAL--PARALLEL PROCESSING; DATA CONVERSION, DIGITAL TO ANALOG; INTEGRATED CIRCUITS, VLSI; MULTIPLEXING;

FEEDFORWARD NEURAL NETWORKS; MULTIPLEXING INPUT NEURON CHIP; NEURON CHIP; PARALLEL HARDWARE NEURAL NETWORK; SYNAPSE CHIP;

SYSTEMS SCIENCE AND CYBERNETICS;

EID: 0024903880     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ijcnn.1989.118697     Document Type: Conference Paper

References (13)